Re: FYI: Rock64 USB3 port no longer works for main [so: 14] (looks like dtb changes invalidating use of the old .dtbo and needing kernel changes)
- Reply: Mark Millard : "Re: FYI: Rock64 USB3 port no longer works for main [so: 14] (looks like dtb changes invalidating use of the old .dtbo and needing kernel changes)"
- In reply to: Mark Millard : "Re: FYI: Rock64 USB3 port no longer works for main [so: 14] (looks like dtb changes invalidating use of the old .dtbo and needing kernel changes)"
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Date: Tue, 15 Nov 2022 21:12:36 UTC
On Tue, 15 Nov 2022 13:03:45 -0800
Mark Millard <marklmi@yahoo.com> wrote:
> On Nov 15, 2022, at 05:05, Emmanuel Vadot <manu@bidouilliste.com> wrote:
>
> > On Fri, 4 Nov 2022 12:31:51 -0700
> > Mark Millard <marklmi@yahoo.com> wrote:
> >
> >> On 2022-Oct-22, at 23:00, Mark Millard <marklmi@yahoo.com> wrote:
> >>
> >>> Well, turns out that part of the "Import device-tree files
> >>> from Linux 5.14" is:
> >>>
> >>> https://cgit.freebsd.org/src/commit/sys/contrib/device-tree/src/arm64/rockchip/rk3328-rock64.dts?id=5956d97f4b32
> >>>
> >>> which has:
> >>>
> >>> diff --git a/sys/contrib/device-tree/src/arm64/rockchip/rk3328-rock64.dts b/sys/contrib/device-tree/src/arm64/rockchip/rk3328-rock64.dts
> >>> index 3bef1f39bc6e..1b0f7e4551ea 100644
> >>> --- a/sys/contrib/device-tree/src/arm64/rockchip/rk3328-rock64.dts
> >>> +++ b/sys/contrib/device-tree/src/arm64/rockchip/rk3328-rock64.dts
> >>> @@ -381,6 +381,11 @@
> >>> status = "okay";
> >>> };
> >>>
> >>> +&usbdrd3 {
> >>> + dr_mode = "host";
> >>> + status = "okay";
> >>> +};
> >>> +
> >>> &usb_host0_ehci {
> >>> status = "okay";
> >>> };
> >>>
> >>> usbdrd3 is for USB3, so "host" now has a sort of dtb change
> >>> in the interfacing for supporting host-mode USB3. The old:
> >>>
> >>> /usr/main-src/sys/dts/arm64/overlays/rk3328-dwc3.dtso
> >>>
> >>> has, in part:
> >>>
> >>> usbdrd3: usb@ff600000 {
> >>> compatible = "rockchip,rk3328-dwc3";
> >>> clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
> >>> <&cru ACLK_USB3OTG>;
> >>> clock-names = "ref_clk", "suspend_clk",
> >>> "bus_clk";
> >>> #address-cells = <2>;
> >>> #size-cells = <2>;
> >>> ranges;
> >>> status = "okay";
> >>>
> >>> usbdrd_dwc3: dwc3@ff600000 {
> >>> compatible = "snps,dwc3";
> >>> reg = <0x0 0xff600000 0x0 0x100000>;
> >>> interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
> >>> dr_mode = "host";
> >>> phy_type = "utmi_wide";
> >>> snps,dis_enblslpm_quirk;
> >>> snps,dis-u2-freeclk-exists-quirk;
> >>> snps,dis_u2_susphy_quirk;
> >>> snps,dis_u3_susphy_quirk;
> >>> snps,dis-del-phy-power-chg-quirk;
> >>> snps,dis-tx-ipgap-linecheck-quirk;
> >>> status = "okay";
> >>> };
> >>> };
> >>>
> >>> which looks to me to likely now conflict with the below --given
> >>> the added "host" usage as of 5.14 reported above:
> >>>
> >>> /usr/main-src/sys/contrib/device-tree/src/arm64/rockchip/rk3328.dtsi
> >>>
> >>> that, as of the 5.13 import, has:
> >>>
> >>> usbdrd3: usb@ff600000 {
> >>> compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
> >>> reg = <0x0 0xff600000 0x0 0x100000>;
> >>> interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
> >>> clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
> >>> <&cru ACLK_USB3OTG>;
> >>> clock-names = "ref_clk", "suspend_clk",
> >>> "bus_clk";
> >>> dr_mode = "otg";
> >>> phy_type = "utmi_wide";
> >>> snps,dis-del-phy-power-chg-quirk;
> >>> snps,dis_enblslpm_quirk;
> >>> snps,dis-tx-ipgap-linecheck-quirk;
> >>> snps,dis-u2-freeclk-exists-quirk;
> >>> snps,dis_u2_susphy_quirk;
> >>> snps,dis_u3_susphy_quirk;
> >>> status = "disabled";
> >>> };
> >>>
> >>> My guess would be that some kernel changes are required
> >>> in order to track this structural changes, not just
> >>> avoiding the old .dtbo . Testing showed that disabling
> >>> the load of the .dtbo was insufficient to fix things.
> >>
> >> FYI:
> >>
> >> The mainline Linux commit that addeed usbdrd3 to
> >> arch/arm64/boot/dts/rockchip/rk3328.dtsi is the
> >> following from 2021-03-24:
> >>
> >> https://github.com/torvalds/linux/commit/44dd5e2106dc2fd01697b539085818d1d1c58df0
> >>
> >> The mainline Linux commit that added the enabling of
> >> the USB3 host mode in
> >> arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
> >> is the following from 2021-05-01:
> >>
> >> https://github.com/torvalds/linux/commit/bbac8bd65f5402281cb7b0452c1c5f367387b459
> >>
> >> ===
> >> Mark Millard
> >> marklmi at yahoo.com
> >>
> >>
> >
> > Hi Mark,
> >
> > See https://reviews.freebsd.org/D37392 (and child reviews) for a fix.
> > This was indeed the import of the new DTS files that caused the first
> > problem (there is no glue node in rk3328.dtsi like in other SoCs or
> > like our overlay). The other commit responsible for breaking USB3
> > support was the addition to RK356x SoC, the check was bad for when to
> > force USB2.
>
> Thanks.
>
> I applied the diff and the 2 child diff's and rebuilt and
> installed, including updating the kernel on the e.MMC that
> is historically used to mount the rootfs on USB3 when the
> USB3 drive is plugged in there. (U-boot does not handle
> the USB context I want.)
>
> Unfortunately, the kernel still only manages to find the
> rootfs when plugged into USB2 instead of USB3.
>
> I do not see any references to dwc3 in the console log.
> There are references to EHCI and OHCI but not XHCI.
> There is:
>
> usbus0: 480Mbps High Speed USB v2.0
> usbus1: 12Mbps Full Speed USB v1.0
> usbus3: 480Mbps High Speed USB v2.0
>
> but nothing for the USB3 rate.
>
> I do have the old rk3328-dwc3.dtbo reference commented out
> in /boot/loader.conf :
>
> #fdt_overlays="rk3328-dwc3.dtbo"
>
> The context was (long output line split for readability):
>
> # uname -apKU
> FreeBSD RPi_4_3_2v1p2 14.0-CURRENT FreeBSD 14.0-CURRENT #48
> main-n259064-f83db6441a2f-dirty: Tue Nov 15 10:19:44 PST 2022
> root@CA72_16Gp_ZFS:/usr/obj/BUILDs/main-CA53-nodbg-clang/usr/main-src/arm64.aarch64/sys/GENERIC-NODBG-CA53
> arm64 aarch64 1400073 1400073
>
> (Shown from a USB2 based boot.)
>
> The Console output from ---<<BOOT>>--- on for the failure was:
>
> ---<<BOOT>>---
> GDB: debug ports: uart
> GDB: current port: uart
> KDB: debugger backends: ddb gdb
> KDB: current backend: ddb
> WARNING: Cannot find freebsd,dts-version property, cannot check DTB compliance
> Copyright (c) 1992-2022 The FreeBSD Project.
> Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
> The Regents of the University of California. All rights reserved.
> FreeBSD is a registered trademark of The FreeBSD Foundation.
> FreeBSD 14.0-CURRENT #48 main-n259064-f83db6441a2f-dirty: Tue Nov 15 10:19:44 PST 2022
> root@CA72_16Gp_ZFS:/usr/obj/BUILDs/main-CA53-nodbg-clang/usr/main-src/arm64.aarch64/sys/GENERIC-NODBG-CA53 arm64
> FreeBSD clang version 14.0.5 (https://github.com/llvm/llvm-project.git llvmorg-14.0.5-0-gc12386ae247c)
> VT: init without driver.
> module firmware already present!
> real memory = 4276092928 (4078 MB)
> avail memory = 4145885184 (3953 MB)
> Starting CPU 1 (1)
> Starting CPU 2 (2)
> Starting CPU 3 (3)
> FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
> random: unblocking device.
> random: entropy device external interface
> MAP fbf17000 mode 2 pages 1
> MAP fbf1b000 mode 2 pages 1
> MAP fbf1d000 mode 2 pages 2
> MAP fbf20000 mode 2 pages 4
> MAP fef30000 mode 2 pages 16
> kbd0 at kbdmux0
> ofwbus0: <Open Firmware Device Tree>
> clk_fixed0: <Fixed clock> on ofwbus0
> rk_grf0: <RockChip General Register Files> mem 0xff100000-0xff100fff on ofwbus0
> rk3328_cru0: <Rockchip RK3328 Clock and Reset Unit> mem 0xff440000-0xff440fff on ofwbus0
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> Cannot set frequency for clk: aclk_bus_pre_c, error: 34
> rk3328_cru0: Failed to set aclk_bus_pre to a frequency of 15000000
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> Cannot set frequency for clk: aclk_peri_pre, error: 34
> rk3328_cru0: Failed to set aclk_peri_pre to a frequency of 15000000
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clknode_link_recalc: Attempt to use unresolved linked clock: hdmi_phy
> Cannot get frequency for clk: hdmi_phy, error: 9
> clk_fixed1: <Fixed clock> on ofwbus0
> regfix0: <Fixed Regulator> on ofwbus0
> regfix1: <Fixed Regulator> on ofwbus0
> regfix2: <Fixed Regulator> on ofwbus0
> regfix3: <Fixed Regulator> on ofwbus0
> simple_mfd0: <Simple MFD (Multi-Functions Device)> mem 0xff450000-0xff45ffff on ofwbus0
> psci0: <ARM Power State Co-ordination Interface Driver> on ofwbus0
> gic0: <ARM Generic Interrupt Controller> mem 0xff811000-0xff811fff,0xff812000-0xff813fff,0xff814000-0xff815fff,0xff816000-0xff817fff irq 52 on ofwbus0
> gic0: pn 0x2, arch 0x2, rev 0x1, implementer 0x43b irqs 160
> rk_pinctrl0: <RockChip Pinctrl controller> on ofwbus0
> gpio0: <RockChip GPIO Bank controller> mem 0xff210000-0xff2100ff irq 53 on rk_pinctrl0
> gpiobus0: <OFW GPIO bus> on gpio0
> gpio1: <RockChip GPIO Bank controller> mem 0xff220000-0xff2200ff irq 54 on rk_pinctrl0
> gpiobus1: <OFW GPIO bus> on gpio1
> gpio2: <RockChip GPIO Bank controller> mem 0xff230000-0xff2300ff irq 55 on rk_pinctrl0
> gpiobus2: <OFW GPIO bus> on gpio2
> gpio3: <RockChip GPIO Bank controller> mem 0xff240000-0xff2400ff irq 56 on rk_pinctrl0
> gpiobus3: <OFW GPIO bus> on gpio3
> rk_i2c0: <RockChip I2C> mem 0xff160000-0xff160fff irq 16 on ofwbus0
> iicbus0: <OFW I2C bus> on rk_i2c0
> rk805_pmu0: <RockChip RK805 PMIC> at addr 0x30 irq 57 on iicbus0
> generic_timer0: <ARMv8 Generic Timer> irq 4,5,6,7 on ofwbus0
> Timecounter "ARM MPCore Timecounter" frequency 24000000 Hz quality 1000
> Event timer "ARM MPCore Eventtimer" frequency 24000000 Hz quality 1000
> rk_tsadc0: <RockChip temperature sensors> mem 0xff250000-0xff2500ff irq 24 on ofwbus0
> cpulist0: <Open Firmware CPU Group> on ofwbus0
> cpu0: <Open Firmware CPU> on cpulist0
> cpufreq_dt0: <Generic cpufreq driver> on cpu0
> cpufreq_dt0: Found cpu-supply
> cpu1: <Open Firmware CPU> on cpulist0
> cpufreq_dt1: <Generic cpufreq driver> on cpu1
> cpufreq_dt1: Found cpu-supply
> cpu2: <Open Firmware CPU> on cpulist0
> cpufreq_dt2: <Generic cpufreq driver> on cpu2
> cpufreq_dt2: Found cpu-supply
> cpu3: <Open Firmware CPU> on cpulist0
> cpufreq_dt3: <Generic cpufreq driver> on cpu3
> cpufreq_dt3: Found cpu-supply
> pcm0: <simple-audio-card> on ofwbus0
> pmu0: <Performance Monitoring Unit> irq 0,1,2,3 on ofwbus0
> pcm1: <simple-audio-card> on ofwbus0
> i2s0: <Rockchip I2S> mem 0xff000000-0xff000fff irq 8 on ofwbus0
> Cannot set frequency for clk: xin12m, error: 34
> Cannot set frequency for clk: xin12m, error: 34
> i2s1: <Rockchip I2S> mem 0xff010000-0xff010fff irq 9 on ofwbus0
> Cannot set frequency for clk: clkin_i2s1, error: 34
> Cannot set frequency for clk: xin12m, error: 34
> uart0: <16750 or compatible> mem 0xff130000-0xff1300ff irq 14 on ofwbus0
> uart0: console (1500000,n,8,1)
> iic0: <I2C generic I/O> on iicbus0
> spi0: <Rockchip SPI> mem 0xff190000-0xff190fff irq 19 on ofwbus0
> spibus0: <OFW SPI bus> on spi0
> spibus0: <unknown card> at cs 0 mode 0
> rockchip_dwmmc0: <Synopsys DesignWare Mobile Storage Host Controller (RockChip)> mem 0xff500000-0xff503fff irq 43 on ofwbus0
> rockchip_dwmmc0: Hardware version ID is 270a
> rockchip_dwmmc1: <Synopsys DesignWare Mobile Storage Host Controller (RockChip)> mem 0xff520000-0xff523fff irq 45 on ofwbus0
> rockchip_dwmmc1: Hardware version ID is 270a
> mmc0: <MMC/SD bus> on rockchip_dwmmc1
> dwc0: <Rockchip Gigabit Ethernet Controller> mem 0xff540000-0xff54ffff irq 46 on ofwbus0
> miibus0: <MII bus> on dwc0
> rgephy0: <RTL8169S/8110S/8211 1000BASE-T media interface> PHY 0 on miibus0
> rgephy0: none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, 1000baseT-FDX-master, auto
> rgephy1: <RTL8169S/8110S/8211 1000BASE-T media interface> PHY 1 on miibus0
> rgephy1: none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, 1000baseT-FDX-master, auto
> dwc0: Ethernet address: d2:64:d7:54:db:8c
> ehci0: <Generic EHCI Controller> mem 0xff5c0000-0xff5cffff irq 48 on ofwbus0
> usbus0: EHCI version 1.0
> usbus0 on ehci0
> ohci0: <Generic OHCI Controller> mem 0xff5d0000-0xff5dffff irq 49 on ofwbus0
> usbus1 on ohci0
> dwcotg0: <DWC OTG 2.0 integrated USB controller> mem 0xff580000-0xff5bffff irq 51 on ofwbus0
> usbus3 on dwcotg0
> gpioc0: <GPIO controller> on gpio0
> gpioc1: <GPIO controller> on gpio1
> gpioc2: <GPIO controller> on gpio2
> gpioc3: <GPIO controller> on gpio3
> gpioled0: <GPIO LEDs> on ofwbus0
> gpioled0: <led-0> failed to map pin
> gpioled0: <led-1> failed to map pin
> pcm2: <simple-audio-card> on ofwbus0
> armv8crypto0: <AES-CBC,AES-XTS,AES-GCM>
> Timecounters tick every 1.000 msec
> rk805_pmu0: registered as a time-of-day clock, resolution 1.000000s
> pcm0: no driver attached to codec node
> pcm1: no driver attached to codec node
> usbus0: 480Mbps High Speed USB v2.0
> usbus1: 12Mbps Full Speed USB v1.0
> usbus3: 480Mbps High Speed USB v2.0
> ugen0.1: <Generic EHCI root HUB> at usbus0
> uhub0 on usbus0
> uhub0: <Generic EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus0
> ugen3.1: <DWCOTG OTG Root HUB> at usbus3
> uhub1 on usbus3
> uhub1: <DWCOTG OTG Root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus3
> ugen1.1: <Generic OHCI root HUB> at usbus1
> uhub2 on usbus1
> uhub2: <Generic OHCI root HUB, class 9/0, rev 1.00/1.00, addr 1> on usbus1
> mmcsd0: 125GB <MMCHC DJNB4R 0.7 SN 9F43B2AE MFG 06/2016 by 21 0x0000> at mmc0 52.0MHz/8bit/1016-block
> mmcsd0boot0: 4MB partition 1 at mmcsd0
> mmcsd0boot1: 4MB partition 2 at mmcsd0
> mmcsd0rpmb: 4MB partition 3 at mmcsd0
> pcm2: no driver attached to cpu node
> CPU 0: ARM Cortex-A53 r0p4 affinity: 0
> Cache Type = <64 byte D-cacheline,64 byte I-cacheline,VIPT ICache,64 byte ERG,64 byte CWG>
> Instruction Set Attributes 0 = <CRC32,SHA2,SHA1,AES+PMULL>
> Instruction Set Attributes 1 = <>
> Instruction Set Attributes 2 = <>
> Processor Features 0 = <AdvSIMD,FP,EL3 32,EL2 32,EL1 32,EL0 32>
> Processor Features 1 = <>
> Memory Model Features 0 = <TGran4,TGran64,SNSMem,BigEnd,16bit ASID,1TB PA>
> Memory Model Features 1 = <8bit VMID>
> Memory Model Features 2 = <32bit CCIDX,48bit VA>
> Debug Features 0 = <DoubleLock,2 CTX BKPTs,4 Watchpoints,6 Breakpoints,PMUv3,Debugv8>
> Debug Features 1 = <>
> Auxiliary Features 0 = <>
> Auxiliary Features 1 = <>
> AArch32 Instruction Set Attributes 5 = <CRC32,SHA2,SHA1,AES+VMULL,SEVL>
> AArch32 Media and VFP Features 0 = <FPRound,FPSqrt,FPDivide,DP VFPv3+v4,SP VFPv3+v4,AdvSIMD>
> AArch32 Media and VFP Features 1 = <SIMDFMAC,FPHP DP Conv,SIMDHP SP Conv,SIMDSP,SIMDInt,SIMDLS,FPDNaN,FPFtZ>
> CPU 1: ARM Cortex-A53 r0p4 affinity: 1
> CPU 2: ARM Cortex-A53 r0p4 affinity: 2
> CPU 3: ARM Cortex-A53 r0p4 affinity: 3
> Release APs...done
> Unresolved linked clock found: hdmi_phy
> Unresolved linked clock found: usb480m_phy
> Trying to mount root from ufs:/dev/gpt/Rock64root []...
> uhub2: 1 port with 1 removable, self powered
> uhub1: 1 port with 1 removable, self powered
> uhub0: 1 port with 1 removable, self powered
> Root mount waiting for: CAM
> Root mount waiting for: CAM
> Root mount waiting for: CAM
> Root mount waiting for: CAM
> Root mount waiting for: CAM
> Root mount waiting for: CAM
> Root mount waiting for: CAM
> Root mount waiting for: CAM
> Root mount waiting for: CAM
> Mounting from ufs:/dev/gpt/Rock64root failed with error 22; retrying for 3 more seconds
> Mounting from ufs:/dev/gpt/Rock64root failed with error 22: Invalid fstype.
>
>
> For reference for the patching I applied (whitespace
> details may not be preserved):
>
> # git -C /usr/main-src/ diff sys/dev/usb/controller/ sys/arm64/rockchip/
> diff --git a/sys/arm64/rockchip/rk_dwc3.c b/sys/arm64/rockchip/rk_dwc3.c
> index 8582f7a86999..645a1cffbd95 100644
> --- a/sys/arm64/rockchip/rk_dwc3.c
> +++ b/sys/arm64/rockchip/rk_dwc3.c
> @@ -54,12 +54,10 @@ __FBSDID("$FreeBSD$");
> #include <dev/extres/syscon/syscon.h>
> enum rk_dwc3_type {
> - RK3328 = 1,
> - RK3399,
> + RK3399 = 1,
> };
> static struct ofw_compat_data compat_data[] = {
> - { "rockchip,rk3328-dwc3", RK3328 },
> { "rockchip,rk3399-dwc3", RK3399 },
> { NULL, 0 }
> };
> diff --git a/sys/dev/usb/controller/dwc3.c b/sys/dev/usb/controller/dwc3.c
> index 2e8f868bc47b..40405927685e 100644
> --- a/sys/dev/usb/controller/dwc3.c
> +++ b/sys/dev/usb/controller/dwc3.c
> @@ -86,6 +86,14 @@ struct snps_dwc3_softc {
> bus_space_tag_t bst;
> bus_space_handle_t bsh;
> uint32_t snpsid;
> + uint32_t snpsversion;
> + uint32_t snpsrevision;
> + uint32_t snpsversion_type;
> +#ifdef FDT
> + clk_t clk_ref;
> + clk_t clk_suspend;
> + clk_t clk_bus;
> +#endif
> };
> #define DWC3_WRITE(_sc, _off, _val) \
> @@ -384,8 +392,31 @@ snps_dwc3_common_attach(device_t dev, bool is_fdt)
> sc->bsh = rman_get_bushandle(sc->mem_res);
> sc->snpsid = DWC3_READ(sc, DWC3_GSNPSID);
> - if (bootverbose)
> - device_printf(sc->dev, "snps id: %#012x\n", sc->snpsid);
> + sc->snpsversion = DWC3_VERSION(sc->snpsid);
> + sc->snpsrevision = DWC3_REVISION(sc->snpsid);
> + if (sc->snpsversion == DWC3_1_IP_ID ||
> + sc->snpsversion == DWC3_2_IP_ID) {
> + sc->snpsrevision = DWC3_READ(sc, DWC3_1_VER_NUMBER);
> + sc->snpsversion_type = DWC3_READ(sc, DWC3_1_VER_TYPE);
> + }
> + if (bootverbose) {
> + switch (sc->snpsversion) {
> + case DWC3_IP_ID:
> + device_printf(sc->dev, "SNPS Version: DWC3 (%x %x)\n",
> + sc->snpsversion, sc->snpsrevision);
> + break;
> + case DWC3_1_IP_ID:
> + device_printf(sc->dev, "SNPS Version: DWC3.1 (%x %x %x)\n",
> + sc->snpsversion, sc->snpsrevision,
> + sc->snpsversion_type);
> + break;
> + case DWC3_2_IP_ID:
> + device_printf(sc->dev, "SNPS Version: DWC3.2 (%x %x %x)\n",
> + sc->snpsversion, sc->snpsrevision,
> + sc->snpsversion_type);
> + break;
> + }
> + }
> #ifdef DWC3_DEBUG
> snps_dwc3_dump_ctrlparams(sc);
> #endif
> @@ -394,9 +425,32 @@ snps_dwc3_common_attach(device_t dev, bool is_fdt)
> if (!is_fdt)
> goto skip_phys;
> - /* Get the phys */
> node = ofw_bus_get_node(dev);
> + /* Get the clocks if any */
> + if (ofw_bus_is_compatible(dev, "rockchip,rk3328-dwc3") == 1) {
> + if (clk_get_by_ofw_name(dev, node, "ref_clk", &sc->clk_ref) != 0)
> + device_printf(dev, "Cannot get ref_clk\n");
> + if (clk_get_by_ofw_name(dev, node, "suspend_clk", &sc->clk_suspend) != 0)
> + device_printf(dev, "Cannot get suspend_clk\n");
> + if (clk_get_by_ofw_name(dev, node, "bus_clk", &sc->clk_bus) != 0)
> + device_printf(dev, "Cannot get bus_clk\n");
> + }
> +
> + if (sc->clk_ref != NULL) {
> + if (clk_enable(sc->clk_ref) != 0)
> + device_printf(dev, "Cannot enable ref_clk\n");
> + }
> + if (sc->clk_suspend != NULL) {
> + if (clk_enable(sc->clk_suspend) != 0)
> + device_printf(dev, "Cannot enable suspend_clk\n");
> + }
> + if (sc->clk_bus != NULL) {
> + if (clk_enable(sc->clk_bus) != 0)
> + device_printf(dev, "Cannot enable bus_clk\n");
> + }
> +
> + /* Get the phys */
> usb2_phy = usb3_phy = NULL;
> error = phy_get_by_ofw_name(dev, node, "usb2-phy", &usb2_phy);
> if (error == 0 && usb2_phy != NULL)
> @@ -427,6 +481,16 @@ snps_dwc3_common_attach(device_t dev, bool is_fdt)
> snsp_dwc3_dump_regs(sc, "Post XHCI init");
> #endif
> +#ifdef FDT
> + if (error) {
> + if (sc->clk_ref != NULL)
> + clk_disable(sc->clk_ref);
> + if (sc->clk_suspend != NULL)
> + clk_disable(sc->clk_suspend);
> + if (sc->clk_bus != NULL)
> + clk_disable(sc->clk_bus);
> + }
> +#endif
> return (error);
> }
> diff --git a/sys/dev/usb/controller/dwc3.h b/sys/dev/usb/controller/dwc3.h
> index 21a87a1917ee..c69672072209 100644
> --- a/sys/dev/usb/controller/dwc3.h
> +++ b/sys/dev/usb/controller/dwc3.h
> @@ -31,6 +31,15 @@
> #ifndef _DWC3_H_
> #define _DWC3_H_
> +#define DWC3_IP_ID 0x5533
> +#define DWC3_1_IP_ID 0x3331
> +#define DWC3_2_IP_ID 0x3332
> +
> +#define DWC3_VERSION_MASK 0xFFFF0000
> +#define DWC3_REVISION_MASK 0xFFFF
> +#define DWC3_VERSION(x) (((x) & DWC3_VERSION_MASK) >> 16)
> +#define DWC3_REVISION(x) ((x) & DWC3_REVISION_MASK)
> +
> #define DWC3_GSBUSCFG0 0xc100
> #define DWC3_GSBUSCFG1 0xc104
> #define DWC3_GTXTHRCFG 0xc108
> @@ -80,6 +89,9 @@
> #define DWC3_GPRTBIMAP_HSLO 0xc180
> #define DWC3_GPRTBIMAP_FSLO 0xc188
> +#define DWC3_1_VER_NUMBER 0xc1a0
> +#define DWC3_1_VER_TYPE 0xc1a4
> +
> #define DWC3_GUSB2PHYCFG0 0xc200
> #define DWC3_GUSB2PHYCFG0_PHYSOFTRST (1 << 31)
> #define DWC3_GUSB2PHYCFG0_U2_FREECLK_EXISTS (1 << 30)
>
>
> ===
> Mark Millard
> marklmi at yahoo.com
>
>
Looks like you're missing https://reviews.freebsd.org/D37394
--
Emmanuel Vadot <manu@bidouilliste.com> <manu@FreeBSD.org>