Re: Failed to execute custom kernels which where build on a RPi 4 operated by 13.1-RELEASE
Date: Tue, 05 Jul 2022 21:32:03 UTC
On 2022-Jul-4, at 18:33, John Kennedy <warlock@phouka.net> wrote: > On Mon, Jul 04, 2022 at 08:57:08PM -0300, Dr. Rolf Jansen wrote: >> On my brand new RPi 4 B (0xb03115), operated by 13.1-RELEASE, I built 2 custom kernels, with kernel configs from different sources. Building and installing went through without issues. > > I've also got a new 8G RPI4, not sure how to get the exact model > number without popping the heatsink case off. The labeling now under the heatsink does not indicate which Rev. 1.? the RPi4B is. C0T just describes the SOC and they change SOC's without needing to change the board revision. Rev increases are board changes, not changes that can use the board unchanged. It may be that all 8 GiByte Rev 1.5 RPi4B's have the SOC that no longer has the "3 GiByte" problem for DMA, for example (SOC type ending in C0T). But it might not be all. Some C0T SOC parts where put on Rev 1.4 boards as I understand --but I'm not sure if any were for an 8 GiByte configuration. I'm not aware of anything in FreeBSD put in place to detect C0T vs. before. There is DeviceTree content that is different related to DMA ranges as I understand. (The .dtb files are loaded and some content is then adjusted by the RPi* firmware before handing over the live DeviceTree. No new .dtb files specific to C0T were made so it is just dynamic adjustment for the issue.) So your: # sysctl hw.fdt hw.fdt.serial-number: <REDACTED> hw.fdt.compatible: raspberrypi,4-model-b brcm,bcm2711 hw.fdt.model: Raspberry Pi 4 Model B Rev 1.5 need not be sufficient to know about the "3 GiByte" problem's status. But it does indicate the board with the modification to allow the different PMIC. === Mark Millard marklmi at yahoo.com