git: ddaf6524682b - main - dev: Use recently added improvements to PME# support to simplify drivers
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Date: Thu, 27 Mar 2025 20:59:50 UTC
The branch main has been updated by jhb:
URL: https://cgit.FreeBSD.org/src/commit/?id=ddaf6524682b3ab9e50f7575db319814dbbd053a
commit ddaf6524682b3ab9e50f7575db319814dbbd053a
Author: John Baldwin <jhb@FreeBSD.org>
AuthorDate: 2025-03-27 20:55:12 +0000
Commit: John Baldwin <jhb@FreeBSD.org>
CommitDate: 2025-03-27 20:55:12 +0000
dev: Use recently added improvements to PME# support to simplify drivers
Depend on the PCI bus driver clearing PME# after resume to remove the
need for clearing PME# from DEVICE_RESUME methods.
Use pci_has_pm and pci_enable_pme.
Reviewed by: Krzysztof Galazka <krzysztof.galazka@intel.com>
Differential Revision: https://reviews.freebsd.org/D49251
---
sys/dev/ae/if_ae.c | 15 ++++-----------
sys/dev/age/if_age.c | 15 +++++----------
sys/dev/age/if_agevar.h | 1 -
sys/dev/alc/if_alc.c | 32 ++++----------------------------
sys/dev/alc/if_alcvar.h | 1 -
sys/dev/ale/if_ale.c | 28 +++++-----------------------
sys/dev/ale/if_alevar.h | 1 -
sys/dev/e1000/if_em.c | 10 +++-------
sys/dev/fxp/if_fxp.c | 34 ++++++++++------------------------
sys/dev/igc/if_igc.c | 10 +++-------
sys/dev/jme/if_jme.c | 26 +++++---------------------
sys/dev/jme/if_jmevar.h | 1 -
sys/dev/nfe/if_nfe.c | 11 +++--------
sys/dev/nge/if_nge.c | 23 +++--------------------
sys/dev/re/if_re.c | 14 ++++----------
sys/dev/rl/if_rl.c | 27 ++++-----------------------
sys/dev/sis/if_sis.c | 15 +++------------
sys/dev/ste/if_ste.c | 25 ++++---------------------
sys/dev/vge/if_vge.c | 23 ++---------------------
sys/dev/vge/if_vgevar.h | 1 -
sys/dev/vr/if_vr.c | 16 +++++-----------
sys/dev/xl/if_xl.c | 16 ++++------------
sys/dev/xl/if_xlreg.h | 1 -
23 files changed, 71 insertions(+), 275 deletions(-)
diff --git a/sys/dev/ae/if_ae.c b/sys/dev/ae/if_ae.c
index 2525c7aa4510..87de885701ae 100644
--- a/sys/dev/ae/if_ae.c
+++ b/sys/dev/ae/if_ae.c
@@ -238,7 +238,7 @@ ae_attach(device_t dev)
if_t ifp;
uint8_t chiprev;
uint32_t pcirev;
- int nmsi, pmc;
+ int nmsi;
int error;
sc = device_get_softc(dev); /* Automatically allocated and zeroed
@@ -336,7 +336,7 @@ ae_attach(device_t dev)
if_sethwassist(ifp, 0);
if_setsendqlen(ifp, ifqmaxlen);
if_setsendqready(ifp);
- if (pci_find_cap(dev, PCIY_PMG, &pmc) == 0) {
+ if (pci_has_pm(dev)) {
if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC, 0);
sc->flags |= AE_FLAG_PMG;
}
@@ -1302,9 +1302,7 @@ ae_pm_init(ae_softc_t *sc)
{
if_t ifp;
uint32_t val;
- uint16_t pmstat;
struct mii_data *mii;
- int pmc;
AE_LOCK_ASSERT(sc);
@@ -1363,13 +1361,8 @@ ae_pm_init(ae_softc_t *sc)
/*
* Configure PME.
*/
- if (pci_find_cap(sc->dev, PCIY_PMG, &pmc) == 0) {
- pmstat = pci_read_config(sc->dev, pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
- if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
- }
+ if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
+ pci_enable_pme(sc->dev);
}
static int
diff --git a/sys/dev/age/if_age.c b/sys/dev/age/if_age.c
index c22a41b9c4e3..46d92ab11f53 100644
--- a/sys/dev/age/if_age.c
+++ b/sys/dev/age/if_age.c
@@ -460,7 +460,7 @@ age_attach(device_t dev)
struct age_softc *sc;
if_t ifp;
uint16_t burst;
- int error, i, msic, msixc, pmc;
+ int error, i, msic, msixc;
error = 0;
sc = device_get_softc(dev);
@@ -600,8 +600,7 @@ age_attach(device_t dev)
if_setsendqready(ifp);
if_setcapabilities(ifp, IFCAP_HWCSUM | IFCAP_TSO4);
if_sethwassist(ifp, AGE_CSUM_FEATURES | CSUM_TSO);
- if (pci_find_cap(dev, PCIY_PMG, &pmc) == 0) {
- sc->age_flags |= AGE_FLAG_PMCAP;
+ if (pci_has_pm(dev)) {
if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC | IFCAP_WOL_MCAST, 0);
}
if_setcapenable(ifp, if_getcapabilities(ifp));
@@ -1303,12 +1302,11 @@ age_setwol(struct age_softc *sc)
if_t ifp;
struct mii_data *mii;
uint32_t reg, pmcs;
- uint16_t pmstat;
- int aneg, i, pmc;
+ int aneg, i;
AGE_LOCK_ASSERT(sc);
- if (pci_find_cap(sc->age_dev, PCIY_PMG, &pmc) != 0) {
+ if (!pci_has_pm(sc->age_dev)) {
CSR_WRITE_4(sc, AGE_WOL_CFG, 0);
/*
* No PME capability, PHY power down.
@@ -1414,11 +1412,8 @@ got_link:
}
/* Request PME. */
- pmstat = pci_read_config(sc->age_dev, pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->age_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->age_dev);
#ifdef notyet
/* See above for powering down PHY issues. */
if ((if_getcapenable(ifp) & IFCAP_WOL) == 0) {
diff --git a/sys/dev/age/if_agevar.h b/sys/dev/age/if_agevar.h
index 72073654d5d2..54e26fed8416 100644
--- a/sys/dev/age/if_agevar.h
+++ b/sys/dev/age/if_agevar.h
@@ -210,7 +210,6 @@ struct age_softc {
#define AGE_FLAG_PCIX 0x0002
#define AGE_FLAG_MSI 0x0004
#define AGE_FLAG_MSIX 0x0008
-#define AGE_FLAG_PMCAP 0x0010
#define AGE_FLAG_DETACH 0x4000
#define AGE_FLAG_LINK 0x8000
diff --git a/sys/dev/alc/if_alc.c b/sys/dev/alc/if_alc.c
index e03cfe590214..7d47054414d6 100644
--- a/sys/dev/alc/if_alc.c
+++ b/sys/dev/alc/if_alc.c
@@ -1594,10 +1594,9 @@ alc_attach(device_t dev)
if_setsendqready(ifp);
if_setcapabilities(ifp, IFCAP_TXCSUM | IFCAP_TSO4);
if_sethwassist(ifp, ALC_CSUM_FEATURES | CSUM_TSO);
- if (pci_find_cap(dev, PCIY_PMG, &base) == 0) {
+ if (pci_has_pm(dev)) {
if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC | IFCAP_WOL_MCAST, 0);
sc->alc_flags |= ALC_FLAG_PM;
- sc->alc_pmcap = base;
}
if_setcapenable(ifp, if_getcapabilities(ifp));
@@ -2530,7 +2529,6 @@ alc_setwol_813x(struct alc_softc *sc)
{
if_t ifp;
uint32_t reg, pmcs;
- uint16_t pmstat;
ALC_LOCK_ASSERT(sc);
@@ -2579,13 +2577,8 @@ alc_setwol_813x(struct alc_softc *sc)
CSR_READ_4(sc, ALC_MASTER_CFG) | MASTER_CLK_SEL_DIS);
}
/* Request PME. */
- pmstat = pci_read_config(sc->alc_dev,
- sc->alc_pmcap + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->alc_dev,
- sc->alc_pmcap + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->alc_dev);
}
static void
@@ -2593,7 +2586,6 @@ alc_setwol_816x(struct alc_softc *sc)
{
if_t ifp;
uint32_t gphy, mac, master, pmcs, reg;
- uint16_t pmstat;
ALC_LOCK_ASSERT(sc);
@@ -2644,13 +2636,8 @@ alc_setwol_816x(struct alc_softc *sc)
if ((sc->alc_flags & ALC_FLAG_PM) != 0) {
/* Request PME. */
- pmstat = pci_read_config(sc->alc_dev,
- sc->alc_pmcap + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->alc_dev,
- sc->alc_pmcap + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->alc_dev);
}
}
@@ -2674,22 +2661,11 @@ alc_resume(device_t dev)
{
struct alc_softc *sc;
if_t ifp;
- uint16_t pmstat;
sc = device_get_softc(dev);
- ALC_LOCK(sc);
- if ((sc->alc_flags & ALC_FLAG_PM) != 0) {
- /* Disable PME and clear PME status. */
- pmstat = pci_read_config(sc->alc_dev,
- sc->alc_pmcap + PCIR_POWER_STATUS, 2);
- if ((pmstat & PCIM_PSTAT_PMEENABLE) != 0) {
- pmstat &= ~PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->alc_dev,
- sc->alc_pmcap + PCIR_POWER_STATUS, pmstat, 2);
- }
- }
/* Reset PHY. */
+ ALC_LOCK(sc);
alc_phy_reset(sc);
ifp = sc->alc_ifp;
if ((if_getflags(ifp) & IFF_UP) != 0) {
diff --git a/sys/dev/alc/if_alcvar.h b/sys/dev/alc/if_alcvar.h
index f68c22146868..c3073c6f0a2e 100644
--- a/sys/dev/alc/if_alcvar.h
+++ b/sys/dev/alc/if_alcvar.h
@@ -219,7 +219,6 @@ struct alc_softc {
uint32_t alc_dma_wr_burst;
uint32_t alc_rcb;
int alc_expcap;
- int alc_pmcap;
int alc_flags;
#define ALC_FLAG_PCIE 0x0001
#define ALC_FLAG_PCIX 0x0002
diff --git a/sys/dev/ale/if_ale.c b/sys/dev/ale/if_ale.c
index c24ff2ea65cb..fa2306f1525e 100644
--- a/sys/dev/ale/if_ale.c
+++ b/sys/dev/ale/if_ale.c
@@ -452,7 +452,7 @@ ale_attach(device_t dev)
struct ale_softc *sc;
if_t ifp;
uint16_t burst;
- int error, i, msic, msixc, pmc;
+ int error, i, msic, msixc;
uint32_t rxf_len, txf_len;
error = 0;
@@ -619,8 +619,7 @@ ale_attach(device_t dev)
if_setsendqready(ifp);
if_setcapabilities(ifp, IFCAP_RXCSUM | IFCAP_TXCSUM | IFCAP_TSO4);
if_sethwassist(ifp, ALE_CSUM_FEATURES | CSUM_TSO);
- if (pci_find_cap(dev, PCIY_PMG, &pmc) == 0) {
- sc->ale_flags |= ALE_FLAG_PMCAP;
+ if (pci_has_pm(dev)) {
if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC | IFCAP_WOL_MCAST, 0);
}
if_setcapenable(ifp, if_getcapabilities(ifp));
@@ -1467,12 +1466,10 @@ ale_setwol(struct ale_softc *sc)
{
if_t ifp;
uint32_t reg, pmcs;
- uint16_t pmstat;
- int pmc;
ALE_LOCK_ASSERT(sc);
- if (pci_find_cap(sc->ale_dev, PCIY_PMG, &pmc) != 0) {
+ if (!pci_has_pm(sc->ale_dev)) {
/* Disable WOL. */
CSR_WRITE_4(sc, ALE_WOL_CFG, 0);
reg = CSR_READ_4(sc, ALE_PCIE_PHYMISC);
@@ -1518,11 +1515,8 @@ ale_setwol(struct ale_softc *sc)
GPHY_CTRL_PWDOWN_HW);
}
/* Request PME. */
- pmstat = pci_read_config(sc->ale_dev, pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->ale_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->ale_dev);
}
static int
@@ -1545,23 +1539,11 @@ ale_resume(device_t dev)
{
struct ale_softc *sc;
if_t ifp;
- int pmc;
- uint16_t pmstat;
sc = device_get_softc(dev);
- ALE_LOCK(sc);
- if (pci_find_cap(sc->ale_dev, PCIY_PMG, &pmc) == 0) {
- /* Disable PME and clear PME status. */
- pmstat = pci_read_config(sc->ale_dev,
- pmc + PCIR_POWER_STATUS, 2);
- if ((pmstat & PCIM_PSTAT_PMEENABLE) != 0) {
- pmstat &= ~PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->ale_dev,
- pmc + PCIR_POWER_STATUS, pmstat, 2);
- }
- }
/* Reset PHY. */
+ ALE_LOCK(sc);
ale_phy_reset(sc);
ifp = sc->ale_ifp;
if ((if_getflags(ifp) & IFF_UP) != 0) {
diff --git a/sys/dev/ale/if_alevar.h b/sys/dev/ale/if_alevar.h
index 2baff5106b81..74ed9edb0ff3 100644
--- a/sys/dev/ale/if_alevar.h
+++ b/sys/dev/ale/if_alevar.h
@@ -200,7 +200,6 @@ struct ale_softc {
#define ALE_FLAG_PCIX 0x0002
#define ALE_FLAG_MSI 0x0004
#define ALE_FLAG_MSIX 0x0008
-#define ALE_FLAG_PMCAP 0x0010
#define ALE_FLAG_FASTETHER 0x0020
#define ALE_FLAG_JUMBO 0x0040
#define ALE_FLAG_RXCSUM_BUG 0x0080
diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c
index 449cb9e07f3a..f49682285875 100644
--- a/sys/dev/e1000/if_em.c
+++ b/sys/dev/e1000/if_em.c
@@ -4503,10 +4503,9 @@ em_enable_wakeup(if_ctx_t ctx)
device_t dev = iflib_get_dev(ctx);
if_t ifp = iflib_get_ifp(ctx);
int error = 0;
- u32 pmc, ctrl, ctrl_ext, rctl;
- u16 status;
+ u32 ctrl, ctrl_ext, rctl;
- if (pci_find_cap(dev, PCIY_PMG, &pmc) != 0)
+ if (!pci_has_pm(dev))
return;
/*
@@ -4563,11 +4562,8 @@ em_enable_wakeup(if_ctx_t ctx)
e1000_igp3_phy_powerdown_workaround_ich8lan(&sc->hw);
pme:
- status = pci_read_config(dev, pmc + PCIR_POWER_STATUS, 2);
- status &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if (!error && (if_getcapenable(ifp) & IFCAP_WOL))
- status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(dev, pmc + PCIR_POWER_STATUS, status, 2);
+ pci_enable_pme(dev);
return;
}
diff --git a/sys/dev/fxp/if_fxp.c b/sys/dev/fxp/if_fxp.c
index b26879cfa25c..7b17b054abb9 100644
--- a/sys/dev/fxp/if_fxp.c
+++ b/sys/dev/fxp/if_fxp.c
@@ -431,7 +431,7 @@ fxp_attach(device_t dev)
uint32_t val;
uint16_t data;
u_char eaddr[ETHER_ADDR_LEN];
- int error, flags, i, pmc, prefer_iomap;
+ int error, flags, i, prefer_iomap;
error = 0;
sc = device_get_softc(dev);
@@ -518,8 +518,7 @@ fxp_attach(device_t dev)
if (sc->revision >= FXP_REV_82558_A4 &&
sc->revision != FXP_REV_82559S_A) {
data = sc->eeprom[FXP_EEPROM_MAP_ID];
- if ((data & 0x20) != 0 &&
- pci_find_cap(sc->dev, PCIY_PMG, &pmc) == 0)
+ if ((data & 0x20) != 0 && pci_has_pm(sc->dev))
sc->flags |= FXP_FLAG_WOLCAP;
}
@@ -1054,24 +1053,17 @@ fxp_suspend(device_t dev)
{
struct fxp_softc *sc = device_get_softc(dev);
if_t ifp;
- int pmc;
- uint16_t pmstat;
FXP_LOCK(sc);
ifp = sc->ifp;
- if (pci_find_cap(sc->dev, PCIY_PMG, &pmc) == 0) {
- pmstat = pci_read_config(sc->dev, pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
- if ((if_getcapenable(ifp) & IFCAP_WOL_MAGIC) != 0) {
- /* Request PME. */
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- sc->flags |= FXP_FLAG_WOL;
- /* Reconfigure hardware to accept magic frames. */
- if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING);
- fxp_init_body(sc, 0);
- }
- pci_write_config(sc->dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+ if ((if_getcapenable(ifp) & IFCAP_WOL_MAGIC) != 0) {
+ /* Request PME. */
+ pci_enable_pme(sc->dev);
+ sc->flags |= FXP_FLAG_WOL;
+ /* Reconfigure hardware to accept magic frames. */
+ if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING);
+ fxp_init_body(sc, 0);
}
fxp_stop(sc);
@@ -1090,17 +1082,11 @@ fxp_resume(device_t dev)
{
struct fxp_softc *sc = device_get_softc(dev);
if_t ifp = sc->ifp;
- int pmc;
- uint16_t pmstat;
FXP_LOCK(sc);
- if (pci_find_cap(sc->dev, PCIY_PMG, &pmc) == 0) {
+ if (pci_has_pm(sc->dev)) {
sc->flags &= ~FXP_FLAG_WOL;
- pmstat = pci_read_config(sc->dev, pmc + PCIR_POWER_STATUS, 2);
- /* Disable PME and clear PME status. */
- pmstat &= ~PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
if ((sc->flags & FXP_FLAG_WOLCAP) != 0)
CSR_WRITE_1(sc, FXP_CSR_PMDR,
CSR_READ_1(sc, FXP_CSR_PMDR));
diff --git a/sys/dev/igc/if_igc.c b/sys/dev/igc/if_igc.c
index 7402f89d56ff..318d2770911c 100644
--- a/sys/dev/igc/if_igc.c
+++ b/sys/dev/igc/if_igc.c
@@ -2450,10 +2450,9 @@ igc_enable_wakeup(if_ctx_t ctx)
device_t dev = iflib_get_dev(ctx);
if_t ifp = iflib_get_ifp(ctx);
int error = 0;
- u32 pmc, ctrl, rctl;
- u16 status;
+ u32 ctrl, rctl;
- if (pci_find_cap(dev, PCIY_PMG, &pmc) != 0)
+ if (!pci_has_pm(dev))
return;
/*
@@ -2487,11 +2486,8 @@ igc_enable_wakeup(if_ctx_t ctx)
IGC_WRITE_REG(&sc->hw, IGC_WUFC, sc->wol);
pme:
- status = pci_read_config(dev, pmc + PCIR_POWER_STATUS, 2);
- status &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if (!error && (if_getcapenable(ifp) & IFCAP_WOL))
- status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(dev, pmc + PCIR_POWER_STATUS, status, 2);
+ pci_enable_pme(dev);
return;
}
diff --git a/sys/dev/jme/if_jme.c b/sys/dev/jme/if_jme.c
index 834717d849a0..d9982a2f031c 100644
--- a/sys/dev/jme/if_jme.c
+++ b/sys/dev/jme/if_jme.c
@@ -625,7 +625,7 @@ jme_attach(device_t dev)
struct mii_data *mii;
uint32_t reg;
uint16_t burst;
- int error, i, mii_flags, msic, msixc, pmc;
+ int error, i, mii_flags, msic, msixc;
error = 0;
sc = device_get_softc(dev);
@@ -815,8 +815,7 @@ jme_attach(device_t dev)
/* JMC250 supports Tx/Rx checksum offload as well as TSO. */
if_setcapabilities(ifp, IFCAP_HWCSUM | IFCAP_TSO4);
if_sethwassist(ifp, JME_CSUM_FEATURES | CSUM_TSO);
- if (pci_find_cap(dev, PCIY_PMG, &pmc) == 0) {
- sc->jme_flags |= JME_FLAG_PMCAP;
+ if (pci_has_pm(dev)) {
if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC, 0);
}
if_setcapenable(ifp, if_getcapabilities(ifp));
@@ -1562,12 +1561,10 @@ jme_setwol(struct jme_softc *sc)
{
if_t ifp;
uint32_t gpr, pmcs;
- uint16_t pmstat;
- int pmc;
JME_LOCK_ASSERT(sc);
- if (pci_find_cap(sc->jme_dev, PCIY_PMG, &pmc) != 0) {
+ if (!pci_has_pm(sc->jme_dev)) {
/* Remove Tx MAC/offload clock to save more power. */
if ((sc->jme_flags & JME_FLAG_TXCLK) != 0)
CSR_WRITE_4(sc, JME_GHC, CSR_READ_4(sc, JME_GHC) &
@@ -1602,11 +1599,8 @@ jme_setwol(struct jme_softc *sc)
~(GHC_TX_OFFLD_CLK_100 | GHC_TX_MAC_CLK_100 |
GHC_TX_OFFLD_CLK_1000 | GHC_TX_MAC_CLK_1000));
/* Request PME. */
- pmstat = pci_read_config(sc->jme_dev, pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->jme_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->jme_dev);
if ((if_getcapenable(ifp) & IFCAP_WOL) == 0) {
/* No WOL, PHY power down. */
jme_phy_down(sc);
@@ -1633,21 +1627,11 @@ jme_resume(device_t dev)
{
struct jme_softc *sc;
if_t ifp;
- uint16_t pmstat;
- int pmc;
sc = device_get_softc(dev);
- JME_LOCK(sc);
- if (pci_find_cap(sc->jme_dev, PCIY_PMG, &pmc) == 0) {
- pmstat = pci_read_config(sc->jme_dev,
- pmc + PCIR_POWER_STATUS, 2);
- /* Disable PME clear PME status. */
- pmstat &= ~PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->jme_dev,
- pmc + PCIR_POWER_STATUS, pmstat, 2);
- }
/* Wakeup PHY. */
+ JME_LOCK(sc);
jme_phy_up(sc);
ifp = sc->jme_ifp;
if ((if_getflags(ifp) & IFF_UP) != 0) {
diff --git a/sys/dev/jme/if_jmevar.h b/sys/dev/jme/if_jmevar.h
index c22c0dee1077..5be250567f8c 100644
--- a/sys/dev/jme/if_jmevar.h
+++ b/sys/dev/jme/if_jmevar.h
@@ -190,7 +190,6 @@ struct jme_softc {
#define JME_FLAG_PCIX 0x00000004
#define JME_FLAG_MSI 0x00000008
#define JME_FLAG_MSIX 0x00000010
-#define JME_FLAG_PMCAP 0x00000020
#define JME_FLAG_FASTETH 0x00000040
#define JME_FLAG_NOJUMBO 0x00000080
#define JME_FLAG_RXCLK 0x00000100
diff --git a/sys/dev/nfe/if_nfe.c b/sys/dev/nfe/if_nfe.c
index 8df4ca27ac9d..4625c2616562 100644
--- a/sys/dev/nfe/if_nfe.c
+++ b/sys/dev/nfe/if_nfe.c
@@ -608,7 +608,7 @@ nfe_attach(device_t dev)
(IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO), 0);
}
- if (pci_find_cap(dev, PCIY_PMG, ®) == 0)
+ if (pci_has_pm(dev))
if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC, 0);
if_setcapenable(ifp, if_getcapabilities(ifp));
@@ -3309,12 +3309,10 @@ nfe_set_wol(struct nfe_softc *sc)
{
if_t ifp;
uint32_t wolctl;
- int pmc;
- uint16_t pmstat;
NFE_LOCK_ASSERT(sc);
- if (pci_find_cap(sc->nfe_dev, PCIY_PMG, &pmc) != 0)
+ if (!pci_has_pm(sc->nfe_dev))
return;
ifp = sc->nfe_ifp;
if ((if_getcapenable(ifp) & IFCAP_WOL_MAGIC) != 0)
@@ -3334,9 +3332,6 @@ nfe_set_wol(struct nfe_softc *sc)
NFE_RX_START);
}
/* Request PME if WOL is requested. */
- pmstat = pci_read_config(sc->nfe_dev, pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->nfe_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->nfe_dev);
}
diff --git a/sys/dev/nge/if_nge.c b/sys/dev/nge/if_nge.c
index 90650bf353a5..b9cf77cc0428 100644
--- a/sys/dev/nge/if_nge.c
+++ b/sys/dev/nge/if_nge.c
@@ -915,7 +915,7 @@ nge_attach(device_t dev)
* supply(3VAUX) to drive PME such that checking PCI power
* management capability is necessary.
*/
- if (pci_find_cap(sc->nge_dev, PCIY_PMG, &i) == 0)
+ if (pci_has_pm(sc->nge_dev))
if_setcapabilitiesbit(ifp, IFCAP_WOL, 0);
if_setcapenable(ifp, if_getcapabilities(ifp));
@@ -2510,12 +2510,10 @@ nge_wol(struct nge_softc *sc)
{
if_t ifp;
uint32_t reg;
- uint16_t pmstat;
- int pmc;
NGE_LOCK_ASSERT(sc);
- if (pci_find_cap(sc->nge_dev, PCIY_PMG, &pmc) != 0)
+ if (!pci_has_pm(sc->nge_dev))
return;
ifp = sc->nge_ifp;
@@ -2556,11 +2554,8 @@ nge_wol(struct nge_softc *sc)
}
/* Request PME. */
- pmstat = pci_read_config(sc->nge_dev, pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->nge_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->nge_dev);
}
/*
@@ -2595,23 +2590,11 @@ nge_resume(device_t dev)
{
struct nge_softc *sc;
if_t ifp;
- uint16_t pmstat;
- int pmc;
sc = device_get_softc(dev);
NGE_LOCK(sc);
ifp = sc->nge_ifp;
- if (pci_find_cap(sc->nge_dev, PCIY_PMG, &pmc) == 0) {
- /* Disable PME and clear PME status. */
- pmstat = pci_read_config(sc->nge_dev,
- pmc + PCIR_POWER_STATUS, 2);
- if ((pmstat & PCIM_PSTAT_PMEENABLE) != 0) {
- pmstat &= ~PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->nge_dev,
- pmc + PCIR_POWER_STATUS, pmstat, 2);
- }
- }
if (if_getflags(ifp) & IFF_UP) {
if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING);
nge_init_locked(sc);
diff --git a/sys/dev/re/if_re.c b/sys/dev/re/if_re.c
index f6c28209d504..091ab2db72ec 100644
--- a/sys/dev/re/if_re.c
+++ b/sys/dev/re/if_re.c
@@ -1685,7 +1685,7 @@ re_attach(device_t dev)
if (if_getcapabilities(ifp) & IFCAP_HWCSUM)
if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWCSUM, 0);
/* Enable WOL if PM is supported. */
- if (pci_find_cap(sc->rl_dev, PCIY_PMG, ®) == 0)
+ if (pci_has_pm(sc->rl_dev))
if_setcapabilitiesbit(ifp, IFCAP_WOL, 0);
if_setcapenable(ifp, if_getcapabilities(ifp));
if_setcapenablebit(ifp, 0, (IFCAP_WOL_UCAST | IFCAP_WOL_MCAST));
@@ -3859,13 +3859,11 @@ static void
re_setwol(struct rl_softc *sc)
{
if_t ifp;
- int pmc;
- uint16_t pmstat;
uint8_t v;
RL_LOCK_ASSERT(sc);
- if (pci_find_cap(sc->rl_dev, PCIY_PMG, &pmc) != 0)
+ if (!pci_has_pm(sc->rl_dev))
return;
ifp = sc->rl_ifp;
@@ -3927,22 +3925,18 @@ re_setwol(struct rl_softc *sc)
*/
/* Request PME if WOL is requested. */
- pmstat = pci_read_config(sc->rl_dev, pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->rl_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->rl_dev);
}
static void
re_clrwol(struct rl_softc *sc)
{
- int pmc;
uint8_t v;
RL_LOCK_ASSERT(sc);
- if (pci_find_cap(sc->rl_dev, PCIY_PMG, &pmc) != 0)
+ if (!pci_has_pm(sc->rl_dev))
return;
/* Enable config register write. */
diff --git a/sys/dev/rl/if_rl.c b/sys/dev/rl/if_rl.c
index 4a5f375c2dd3..c045e57fb79a 100644
--- a/sys/dev/rl/if_rl.c
+++ b/sys/dev/rl/if_rl.c
@@ -640,7 +640,7 @@ rl_attach(device_t dev)
const struct rl_type *t;
struct sysctl_ctx_list *ctx;
struct sysctl_oid_list *children;
- int error = 0, hwrev, i, phy, pmc, rid;
+ int error = 0, hwrev, i, phy, rid;
int prefer_iomap, unit;
uint16_t rl_did = 0;
char tn[32];
@@ -803,8 +803,7 @@ rl_attach(device_t dev)
if_setinitfn(ifp, rl_init);
if_setcapabilities(ifp, IFCAP_VLAN_MTU);
/* Check WOL for RTL8139B or newer controllers. */
- if (sc->rl_type == RL_8139 &&
- pci_find_cap(sc->rl_dev, PCIY_PMG, &pmc) == 0) {
+ if (sc->rl_type == RL_8139 && pci_has_pm(sc->rl_dev)) {
hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
switch (hwrev) {
case RL_HWREV_8139B:
@@ -1972,24 +1971,13 @@ rl_resume(device_t dev)
{
struct rl_softc *sc;
if_t ifp;
- int pmc;
- uint16_t pmstat;
sc = device_get_softc(dev);
ifp = sc->rl_ifp;
RL_LOCK(sc);
- if ((if_getcapabilities(ifp) & IFCAP_WOL) != 0 &&
- pci_find_cap(sc->rl_dev, PCIY_PMG, &pmc) == 0) {
- /* Disable PME and clear PME status. */
- pmstat = pci_read_config(sc->rl_dev,
- pmc + PCIR_POWER_STATUS, 2);
- if ((pmstat & PCIM_PSTAT_PMEENABLE) != 0) {
- pmstat &= ~PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->rl_dev,
- pmc + PCIR_POWER_STATUS, pmstat, 2);
- }
+ if ((if_getcapabilities(ifp) & IFCAP_WOL) != 0) {
/*
* Clear WOL matching such that normal Rx filtering
* wouldn't interfere with WOL patterns.
@@ -2037,8 +2025,6 @@ static void
rl_setwol(struct rl_softc *sc)
{
if_t ifp;
- int pmc;
- uint16_t pmstat;
uint8_t v;
RL_LOCK_ASSERT(sc);
@@ -2046,8 +2032,6 @@ rl_setwol(struct rl_softc *sc)
ifp = sc->rl_ifp;
if ((if_getcapabilities(ifp) & IFCAP_WOL) == 0)
return;
- if (pci_find_cap(sc->rl_dev, PCIY_PMG, &pmc) != 0)
- return;
/* Enable config register write. */
CSR_WRITE_1(sc, RL_EECMD, RL_EE_MODE);
@@ -2080,11 +2064,8 @@ rl_setwol(struct rl_softc *sc)
CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF);
/* Request PME if WOL is requested. */
- pmstat = pci_read_config(sc->rl_dev, pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->rl_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->rl_dev);
}
static void
diff --git a/sys/dev/sis/if_sis.c b/sys/dev/sis/if_sis.c
index 5879674b4fbb..d00cf0a8128c 100644
--- a/sys/dev/sis/if_sis.c
+++ b/sys/dev/sis/if_sis.c
@@ -898,7 +898,7 @@ sis_attach(device_t dev)
u_char eaddr[ETHER_ADDR_LEN];
struct sis_softc *sc;
if_t ifp;
- int error = 0, pmc;
+ int error = 0;
sc = device_get_softc(dev);
@@ -1066,7 +1066,7 @@ sis_attach(device_t dev)
if_setsendqlen(ifp, SIS_TX_LIST_CNT - 1);
if_setsendqready(ifp);
- if (pci_find_cap(sc->sis_dev, PCIY_PMG, &pmc) == 0) {
+ if (pci_has_pm(sc->sis_dev)) {
if (sc->sis_type == SIS_TYPE_83815)
if_setcapabilitiesbit(ifp, IFCAP_WOL, 0);
else
@@ -2311,8 +2311,6 @@ sis_wol(struct sis_softc *sc)
{
if_t ifp;
uint32_t val;
- uint16_t pmstat;
- int pmc;
ifp = sc->sis_ifp;
if ((if_getcapenable(ifp) & IFCAP_WOL) == 0)
@@ -2339,20 +2337,13 @@ sis_wol(struct sis_softc *sc)
/* Enable silent RX mode. */
SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RX_ENABLE);
} else {
- if (pci_find_cap(sc->sis_dev, PCIY_PMG, &pmc) != 0)
- return;
val = 0;
if ((if_getcapenable(ifp) & IFCAP_WOL_MAGIC) != 0)
val |= SIS_PWRMAN_WOL_MAGIC;
CSR_WRITE_4(sc, SIS_PWRMAN_CTL, val);
/* Request PME. */
- pmstat = pci_read_config(sc->sis_dev,
- pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL_MAGIC) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->sis_dev,
- pmc + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->sis_dev);
}
}
diff --git a/sys/dev/ste/if_ste.c b/sys/dev/ste/if_ste.c
index 7b347a97712f..bf8f6fafec11 100644
--- a/sys/dev/ste/if_ste.c
+++ b/sys/dev/ste/if_ste.c
@@ -905,7 +905,7 @@ ste_attach(device_t dev)
struct ste_softc *sc;
if_t ifp;
uint16_t eaddr[ETHER_ADDR_LEN / 2];
- int error = 0, phy, pmc, prefer_iomap, rid;
+ int error = 0, phy, prefer_iomap, rid;
sc = device_get_softc(dev);
sc->ste_dev = dev;
@@ -1020,7 +1020,7 @@ ste_attach(device_t dev)
*/
if_setifheaderlen(ifp, sizeof(struct ether_vlan_header));
if_setcapabilitiesbit(ifp, IFCAP_VLAN_MTU, 0);
- if (pci_find_cap(dev, PCIY_PMG, &pmc) == 0)
+ if (pci_has_pm(dev))
if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC, 0);
if_setcapenable(ifp, if_getcapabilities(ifp));
#ifdef DEVICE_POLLING
@@ -1992,21 +1992,9 @@ ste_resume(device_t dev)
{
struct ste_softc *sc;
if_t ifp;
- int pmc;
- uint16_t pmstat;
sc = device_get_softc(dev);
STE_LOCK(sc);
- if (pci_find_cap(sc->ste_dev, PCIY_PMG, &pmc) == 0) {
- /* Disable PME and clear PME status. */
- pmstat = pci_read_config(sc->ste_dev,
- pmc + PCIR_POWER_STATUS, 2);
- if ((pmstat & PCIM_PSTAT_PMEENABLE) != 0) {
- pmstat &= ~PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->ste_dev,
- pmc + PCIR_POWER_STATUS, pmstat, 2);
- }
- }
ifp = sc->ste_ifp;
if ((if_getflags(ifp) & IFF_UP) != 0) {
if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING);
@@ -2095,13 +2083,11 @@ static void
ste_setwol(struct ste_softc *sc)
{
if_t ifp;
- uint16_t pmstat;
uint8_t val;
- int pmc;
STE_LOCK_ASSERT(sc);
- if (pci_find_cap(sc->ste_dev, PCIY_PMG, &pmc) != 0) {
+ if (!pci_has_pm(sc->ste_dev)) {
/* Disable WOL. */
CSR_READ_1(sc, STE_WAKE_EVENT);
CSR_WRITE_1(sc, STE_WAKE_EVENT, 0);
@@ -2116,9 +2102,6 @@ ste_setwol(struct ste_softc *sc)
val |= STE_WAKEEVENT_MAGICPKT_ENB | STE_WAKEEVENT_WAKEONLAN_ENB;
CSR_WRITE_1(sc, STE_WAKE_EVENT, val);
/* Request PME. */
- pmstat = pci_read_config(sc->ste_dev, pmc + PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL_MAGIC) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->ste_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
+ pci_enable_pme(sc->ste_dev);
}
diff --git a/sys/dev/vge/if_vge.c b/sys/dev/vge/if_vge.c
index 395715e67e48..227ce30d9a2c 100644
--- a/sys/dev/vge/if_vge.c
+++ b/sys/dev/vge/if_vge.c
@@ -1024,10 +1024,8 @@ vge_attach(device_t dev)
sc->vge_expcap = cap;
} else
sc->vge_flags |= VGE_FLAG_JUMBO;
- if (pci_find_cap(dev, PCIY_PMG, &cap) == 0) {
+ if (pci_has_pm(dev))
sc->vge_flags |= VGE_FLAG_PMCAP;
- sc->vge_pmcap = cap;
- }
rid = 0;
msic = pci_msi_count(dev);
if (msi_disable == 0 && msic > 0) {
@@ -2444,20 +2442,9 @@ vge_resume(device_t dev)
{
struct vge_softc *sc;
if_t ifp;
- uint16_t pmstat;
sc = device_get_softc(dev);
VGE_LOCK(sc);
- if ((sc->vge_flags & VGE_FLAG_PMCAP) != 0) {
- /* Disable PME and clear PME status. */
- pmstat = pci_read_config(sc->vge_dev,
- sc->vge_pmcap + PCIR_POWER_STATUS, 2);
- if ((pmstat & PCIM_PSTAT_PMEENABLE) != 0) {
- pmstat &= ~PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->vge_dev,
- sc->vge_pmcap + PCIR_POWER_STATUS, pmstat, 2);
- }
- }
vge_clrwol(sc);
/* Restart MII auto-polling. */
vge_miipoll_start(sc);
@@ -2836,7 +2823,6 @@ static void
vge_setwol(struct vge_softc *sc)
{
if_t ifp;
- uint16_t pmstat;
uint8_t val;
VGE_LOCK_ASSERT(sc);
@@ -2888,13 +2874,8 @@ vge_setwol(struct vge_softc *sc)
val |= VGE_STICKHW_DS0 | VGE_STICKHW_DS1;
CSR_WRITE_1(sc, VGE_PWRSTAT, val);
/* Request PME if WOL is requested. */
- pmstat = pci_read_config(sc->vge_dev, sc->vge_pmcap +
- PCIR_POWER_STATUS, 2);
- pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0)
- pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
- pci_write_config(sc->vge_dev, sc->vge_pmcap + PCIR_POWER_STATUS,
- pmstat, 2);
+ pci_enable_pme(sc->vge_dev);
}
static void
diff --git a/sys/dev/vge/if_vgevar.h b/sys/dev/vge/if_vgevar.h
index 84bd7bcb0fc5..d2b1cf8e4b2a 100644
--- a/sys/dev/vge/if_vgevar.h
+++ b/sys/dev/vge/if_vgevar.h
@@ -191,7 +191,6 @@ struct vge_softc {
#define VGE_FLAG_SUSPENDED 0x4000
#define VGE_FLAG_LINK 0x8000
int vge_expcap;
*** 124 LINES SKIPPED ***