git: e29afe64efd2 - main - riscv: fix csr_swap()

The branch main has been updated by br:

URL: https://cgit.FreeBSD.org/src/commit/?id=e29afe64efd22b5f503d1f2558c38362b56be812

commit e29afe64efd22b5f503d1f2558c38362b56be812
Author:     Ruslan Bukin <br@FreeBSD.org>
AuthorDate: 2024-09-04 09:04:11 +0000
Commit:     Ruslan Bukin <br@FreeBSD.org>
CommitDate: 2024-09-04 09:08:40 +0000

    riscv: fix csr_swap()
    
    Fix csr_swap() macro so that we don't overwrite the argument (which is not
    even possible when the argument is an immediate value)
    
    Reviewed by: jrtc27
    
    Differential Revision: https://reviews.freebsd.org/D46526
---
 sys/riscv/include/riscvreg.h | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/sys/riscv/include/riscvreg.h b/sys/riscv/include/riscvreg.h
index 6a59b0132b1b..e1ad09acedc8 100644
--- a/sys/riscv/include/riscvreg.h
+++ b/sys/riscv/include/riscvreg.h
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2015-2017 Ruslan Bukin <br@bsdpad.com>
+ * Copyright (c) 2015-2024 Ruslan Bukin <br@bsdpad.com>
  * All rights reserved.
  *
  * Portions of this software were developed by SRI International and the
@@ -189,13 +189,14 @@
 	(__builtin_constant_p(val) && ((u_long)(val) < 32))
 
 #define	csr_swap(csr, val)						\
-({	if (CSR_ZIMM(val))  						\
+({	u_long ret;							\
+	if (CSR_ZIMM(val))  						\
 		__asm __volatile("csrrwi %0, " #csr ", %1"		\
-				: "=r" (val) : "i" (val));		\
+				: "=r" (ret) : "i" (val));		\
 	else 								\
 		__asm __volatile("csrrw %0, " #csr ", %1"		\
-				: "=r" (val) : "r" (val));		\
-	val;								\
+				: "=r" (ret) : "r" (val));		\
+	ret;								\
 })
 
 #define	csr_write(csr, val)						\