From nobody Sun Jun 02 21:15:06 2024 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4VsqPz489Cz5LDcf for ; Sun, 02 Jun 2024 21:15:19 +0000 (UTC) (envelope-from jrtc27@jrtc27.com) Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "smtp.gmail.com", Issuer "WR4" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4VsqPz2Xr5z4sRJ for ; Sun, 2 Jun 2024 21:15:19 +0000 (UTC) (envelope-from jrtc27@jrtc27.com) Authentication-Results: mx1.freebsd.org; none Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-35e573c0334so266176f8f.1 for ; Sun, 02 Jun 2024 14:15:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717362917; x=1717967717; h=to:references:message-id:content-transfer-encoding:cc:date :in-reply-to:from:subject:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=upH1qr1ZquRZ8sYsU5HDwE5NQE1U/kP5xoHd/4Ro2oY=; b=GNHZXS0BX1cZxDAWJdM8el4OArP5UXUeBU3mYDEIk6Pi2ouMAZj+MPQF/ELcrUQWm/ zAeJEIjcUj3D05coBWu9nx6Ket2b2aPGJ95QW/rmP7Oi6I4QnsH+Nrcx5V1hIvCfvHTP Qd0kVaWah/9rZk3eJZZMyByv3obk3if4rjq9hvNNxmYII78A9gWuUEnjb2ePgrIHWPcL rTGT5g1U3RX/nMpbSsPwxZbJjzvdDQiyBVDSZxmrCp474hIIVrtYu7Uv/jjI/HkaQ0ND jAILnCsdHHrxCxLFxtjR8aFE5r8+JAe0PakLkYohxxrivUIbAcnleBVVpOcop/z1yr5C WXBQ== X-Forwarded-Encrypted: i=1; AJvYcCVa6hofqyfZkaWWGwOiuaOqC4BnaTZThDDlwR2lTWJz4s5IX5SLPeoka1BgEQwA0I32IHavCTbn831xYb6VQQeCFs9Ul16MWT9W8lPGjN99Ag== X-Gm-Message-State: AOJu0Yw5doXWU+5ibPysWOIwFbdPwxiKkDPBTZJ0q6ZfBbVC+iBrmy4Z Ze4gOvgJL4qG+enT8zNZ2YeocY/5MoZ3edG+Pi9GdWhP+kqZjk50AISGF4IeWjM= X-Google-Smtp-Source: AGHT+IEJ+nGwB89hfWJirrXTFYqOGZuXUjc2uOmn8n5g2VzttJYRbvyxjq6qOSIyPFARQBeggx1NBg== X-Received: by 2002:a5d:640e:0:b0:34d:8ed4:ca3b with SMTP id ffacd0b85a97d-35e0e523c46mr7097215f8f.0.1717362917192; Sun, 02 Jun 2024 14:15:17 -0700 (PDT) Received: from smtpclient.apple ([131.111.5.246]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-35dd064aa6csm6926901f8f.93.2024.06.02.14.15.16 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Jun 2024 14:15:16 -0700 (PDT) Content-Type: text/plain; charset=utf-8 List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3774.500.171.1.1\)) Subject: Re: git: 28aaa58fa64e - main - fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset sequence From: Jessica Clarke In-Reply-To: <0100018fdac22280-97d0bb7c-c35e-4017-aeb8-9c9f2413094c-000000@email.amazonses.com> Date: Sun, 2 Jun 2024 22:15:06 +0100 Cc: "src-committers@freebsd.org" , "dev-commits-src-all@freebsd.org" , "dev-commits-src-main@freebsd.org" Content-Transfer-Encoding: quoted-printable Message-Id: <6489FC3C-5B0E-4B07-A6EF-92EA3B353423@freebsd.org> References: <202406022043.452Khmjb050139@gitrepo.freebsd.org> <0100018fdac22280-97d0bb7c-c35e-4017-aeb8-9c9f2413094c-000000@email.amazonses.com> To: Colin Percival X-Mailer: Apple Mail (2.3774.500.171.1.1) X-Spamd-Bar: ---- X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spamd-Result: default: False [-4.00 / 15.00]; REPLY(-4.00)[]; ASN(0.00)[asn:15169, ipnet:209.85.128.0/17, country:US] X-Rspamd-Queue-Id: 4VsqPz2Xr5z4sRJ On 2 Jun 2024, at 22:01, Colin Percival wrote: >=20 > On 6/2/24 13:43, Jessica Clarke wrote: >> fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset = sequence >> DELAY takes microseconds not milliseconds, so 100 was too = low. Moreover, >> when enabling hw.pci.clear_pcib, PCI emeration would still stop = at one >> of the first bridges, but by asserting PERST for the rest of the = reset >> sequence that appears to be reliably addressed. >=20 > Does this need to be a DELAY as opposed to something asynchronous? We = try to > avoid lengthy DELAYs in the boot process. It=E2=80=99s in the middle of device_attach, so you=E2=80=99d need to = break it up into two stages. I don=E2=80=99t know if we have a good way of doing that for delays; I=E2=80=99ve seen other glue code drivers do things like this, = but there may well be a better way, and if so I=E2=80=99m all ears. Though = given you won=E2=80=99t have working PCI (so no USB nor NVMe) until this is = done there=E2=80=99s probably not much more you can do during boot whilst you = wait, so it may not be worth pursuing. Also, given the performance of the SoC in question, 100ms isn=E2=80=99t something you=E2=80=99d be close to = noticing... Jess