git: 800b39cf99b2 - main - arm64: Remove CNTHCTL_EL2 from arm64.h
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Date: Wed, 24 May 2023 16:20:17 UTC
The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=800b39cf99b22614c17a5e12156acbb3df66156a commit 800b39cf99b22614c17a5e12156acbb3df66156a Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2023-05-24 14:22:41 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2023-05-24 16:20:05 +0000 arm64: Remove CNTHCTL_EL2 from arm64.h It is also in hypervisor.h where it belongs. Sponsored by: Arm Ltd --- sys/arm64/include/armreg.h | 7 ------- 1 file changed, 7 deletions(-) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 5c174bcbc838..cd5e7b8e1db8 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -101,13 +101,6 @@ #define CLIDR_CTYPE_ID 0x3 /* Split instruction and data */ #define CLIDR_CTYPE_UNIFIED 0x4 /* Unified */ -/* CNTHCTL_EL2 - Counter-timer Hypervisor Control register */ -#define CNTHCTL_EVNTI_MASK (0xf << 4) /* Bit to trigger event stream */ -#define CNTHCTL_EVNTDIR (1 << 3) /* Control transition trigger bit */ -#define CNTHCTL_EVNTEN (1 << 2) /* Enable event stream */ -#define CNTHCTL_EL1PCEN (1 << 1) /* Allow EL0/1 physical timer access */ -#define CNTHCTL_EL1PCTEN (1 << 0) /*Allow EL0/1 physical counter access*/ - /* CNTP_CTL_EL0 - Counter-timer Physical Timer Control register */ #define CNTP_CTL_EL0 MRS_REG(CNTP_CTL_EL0) #define CNTP_CTL_EL0_op0 3