From nobody Sat Jun 17 16:35:49 2023 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4Qk1qT4vkpz4dwpS; Sat, 17 Jun 2023 16:35:49 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4Qk1qT4VMGz4MZg; Sat, 17 Jun 2023 16:35:49 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1687019749; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=PGGS0nm80MMgFpyh5WIanwrD/CRQhbJupUKqVK3Cibw=; b=NvuY/ZVcqy6kOt4ZACoG9qklD4VEtQnNGZf1dYFEIKCDXrIJS6JR7LdhapurxyRrkDFBYW CTe48Tw/Mu/6b7PtoG7y+t03aXJEbarkUjxf1hN/gE9hAQp8E21gUvoxRkjUDE/jOk2TeJ qM9M/r79m8D/f30/Ae3JDhBRaDNV2PBp5UClDYoGuL+eoHQ/tIPFz/7bbVhqvNBtwh12fF hUCRzj1RSookGyn1nCPTJ/BWJEUYXXG/fwIPBQvYn14+Wp66TSziUNrpLEnPpkMwlX1k2n uzdHmDmWqz2WomewBiML7f4fkxXaK4/ey+Kfz/TkCSa53udNVvB+0btcenVVsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1687019749; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=PGGS0nm80MMgFpyh5WIanwrD/CRQhbJupUKqVK3Cibw=; b=TccpGDDFDLvruUjh3fxkZzObQ+tr70IWDGsY+yafzodF4isnpZwXJPPU32QeXxkXN+ccvF nQKMHV5382WLuU7cBo8JCI/4Lzm7MEQycjIdyabGk8Z2p2sSTgfx8p80JsEt6GBHtyCVCm dGzEnKTZmqdN/iLEkCJipjHhLFQmT0xUvhruV4wdD6Ri4C2I3KGG7vPS9jIWxGR8iyGT39 U4izQkhGKpaScglHPNswKBAi9QcnNhfttgO/CGz4OLxLc5CrtLMwini0/dpNV/baZR+I79 caTHY74Ef28qIxWEMgDSvg4qx9SxCslZmmMwSNTM7kb4SdkoNVPI2537nE46qw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1687019749; a=rsa-sha256; cv=none; b=IVAHotsb3EGoJw/FbkjCpweeOW5jSExvq1BEUAJJ2mvK9M0zKUwGbDkB5aKvJjjITVgOPk RpyiXxA/ftCebsS7GqcygVqDUNJP/ZPvJ7G8uR6VGQs6UwrMd7WGJR1GyOIIvvEuxLKY3O E5xTl1OUHNh2ujI/JcrUWFSxAhN2esEnJwzydOSbQQo0/PcdiUPafEKgvX89KCD9whd5y5 UwyNrjKSeKtAqgH6szab2Wc2RD/UsG1yyuDYfLnQpEB5mYKotzh/+QJbm7O3k2dZC+fxQz 8C/Mr/i8kiMN70pvDtdE2BKREvynaXkq/7Fqv8bpCJ0qS/lcmP3W7d+AhPY3sg== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4Qk1qT3Z6qz1GqB; Sat, 17 Jun 2023 16:35:49 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 35HGZndR033082; Sat, 17 Jun 2023 16:35:49 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 35HGZnHM033081; Sat, 17 Jun 2023 16:35:49 GMT (envelope-from git) Date: Sat, 17 Jun 2023 16:35:49 GMT Message-Id: <202306171635.35HGZnHM033081@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Mitchell Horne Subject: git: c1cbabe8ae57 - main - amdtemp: Fix missing 49 degree offset on current EPYC CPUs List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-main@freebsd.org X-BeenThere: dev-commits-src-main@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mhorne X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: c1cbabe8ae5702a1e54d62401fe3b58a84fcb3e4 Auto-Submitted: auto-generated X-ThisMailContainsUnwantedMimeParts: N The branch main has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=c1cbabe8ae5702a1e54d62401fe3b58a84fcb3e4 commit c1cbabe8ae5702a1e54d62401fe3b58a84fcb3e4 Author: Val Packett AuthorDate: 2023-06-17 16:29:53 +0000 Commit: Mitchell Horne CommitDate: 2023-06-17 16:34:39 +0000 amdtemp: Fix missing 49 degree offset on current EPYC CPUs On an EPYC 7313P, the temperature reported by amdtemp was off, because the offset was not applied. Turns out it needs to be applied with one more condition: https://lkml.org/lkml/2023/4/13/1095 Reviewed by: mhorne Tested by: mike.jakubik@gmail.com MFC after: 1 week Sponsored by: https://www.patreon.com/valpackett Pull Request: https://github.com/freebsd/freebsd-src/pull/754 --- sys/dev/amdtemp/amdtemp.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/sys/dev/amdtemp/amdtemp.c b/sys/dev/amdtemp/amdtemp.c index c020d481797a..fa58a3a4fc83 100644 --- a/sys/dev/amdtemp/amdtemp.c +++ b/sys/dev/amdtemp/amdtemp.c @@ -165,6 +165,12 @@ static const struct amdtemp_product { */ #define AMDTEMP_17H_CUR_TMP 0x59800 #define AMDTEMP_17H_CUR_TMP_RANGE_SEL (1u << 19) +/* + * Bits 16-17, when set, mean that CUR_TMP is read-write. When it is, the + * 49 degree offset should apply as well. This was revealed in a Linux + * patch from an AMD employee. + */ +#define AMDTEMP_17H_CUR_TMP_TJ_SEL ((1u << 17) | (1u << 16)) /* * The following register set was discovered experimentally by Ondrej Čerman * and collaborators, but is not (yet) documented in a PPR/OSRR (other than @@ -731,7 +737,8 @@ amdtemp_decode_fam17h_tctl(int32_t sc_offset, uint32_t val) { bool minus49; - minus49 = ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0); + minus49 = ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0) + || ((val & AMDTEMP_17H_CUR_TMP_TJ_SEL) == AMDTEMP_17H_CUR_TMP_TJ_SEL); return (amdtemp_decode_fam10h_to_17h(sc_offset, val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT, minus49)); }