From nobody Fri Jul 28 12:08:09 2023 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4RC5xt0wdRz4pyVS; Fri, 28 Jul 2023 12:08:18 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4RC5xj566Qz42sr; Fri, 28 Jul 2023 12:08:09 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1690546089; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=coJFi+6xdZi+e738aHn4YR9P3o9z0tDU2AvKFLHu5tc=; b=EeYvwA1GguZeSPYgzaoEWvgC5CEMB/e7+UL7IQiGMLm05oJ4FuZapqNKUDm9XmMHkauPkc D+XfK2whIAldEaUwOOZNDLFxYsNJdfj88Ov0E19fgq7Fo1hyocD2aU78oBFzM5ZNB0zTqv PahkhgC3TOwbi2nFtm2gfkFm23kO9YFR6TuWMPpPT9om/H3QaK1AVD/113EALaaS8Aw5Ya saeAaIhSbkR3mpOYZ+rZFfB2bz4Wad1CHNn+xadR0fton8+sRhmvhlXiU6fWiaWufaVMk7 pqSwD+MOMZk9Ue08LWdlMRuvh7YatDGbcrEnn6iUVYdcj2xPaxqPoDcpPC3Lew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1690546089; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=coJFi+6xdZi+e738aHn4YR9P3o9z0tDU2AvKFLHu5tc=; b=nEbU7JrY7x/2ftp8UKjOo56bFlJW6fbsduCaM+lc5LhpmM+HYfoeW383cwJrSzeJE4rVSn IZlpP1ekZAG3Yxgs/bWyDNz5+MqhBqrznZrCJF3VAzUVnsmuRrdP7Tywp/oBowSbR+cBiS h4A7zHQpLzyJKVSRG83P6WNACSpUUPtHbJID4ZoyK7M4oiieVY6353NdKAWl0ALfEbUUOh BhKWfGQHGaSFs7w4RQW2JgMmd4qQ2Koh2Jwia+CQEcLUaoKwzIh+T1Mw7CugKqar4x98st qJHR3/+LeptdBZYngv6/XLo9vEGUo8US2n+9fzS03sZD+w4V2VRc8C/5o4ijNg== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1690546089; a=rsa-sha256; cv=none; b=VY/pGEGe9zL5fkASGOnhS0YtckE6ZFYT/pH/5cfZntz6UAsJJDd2iya6eXRBAKUeGVdKw+ aCGP0TPT+CeyjHWwKMv2cGujiUCE9pCTraWvigb3Vh1KkNMA88HMulgvUXo1/pix4POeCt krzR3IXzQl8h1vvvpyimQwEFhsMzdIgDSqe2RdUv/mk5fE7joH6MLSvKyvRtCce9gr3AwE 1Zy6Q2SEhGe8W6k1ar8P0z5AuO3pbFJ+1FqT1ZOct3ppYnmGlNPtF3o2qpkdhwIqhpfPR3 AsfDKxRsy49hSOMQDH/WimLz7QgAsNp4BaxOdvmSU1I7kupAVDGc9nSP4lYPXw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4RC5xj2vhBzqZS; Fri, 28 Jul 2023 12:08:09 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 36SC89KX062222; Fri, 28 Jul 2023 12:08:09 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 36SC89Uq062221; Fri, 28 Jul 2023 12:08:09 GMT (envelope-from git) Date: Fri, 28 Jul 2023 12:08:09 GMT Message-Id: <202307281208.36SC89Uq062221@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Andrew Turner Subject: git: 8c111e5b3758 - main - arm64: Update the ID_AA64PFR1_EL1 fields List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-main@freebsd.org X-BeenThere: dev-commits-src-main@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 8c111e5b375897bc298b8cdb3095f3c0e29c2307 Auto-Submitted: auto-generated The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=8c111e5b375897bc298b8cdb3095f3c0e29c2307 commit 8c111e5b375897bc298b8cdb3095f3c0e29c2307 Author: Andrew Turner AuthorDate: 2023-07-06 14:40:01 +0000 Commit: Andrew Turner CommitDate: 2023-07-28 11:53:02 +0000 arm64: Update the ID_AA64PFR1_EL1 fields While here move to decimal for the _op and _CR definitions to be used by a future macro to define the register when the assembler doesn't know about it. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D40896 --- sys/arm64/arm64/identcpu.c | 51 ++++++++++++++++++++++++++++++++++++++++++++-- sys/arm64/include/armreg.h | 46 +++++++++++++++++++++++++++++++++-------- 2 files changed, 86 insertions(+), 11 deletions(-) diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c index 91ba6beb63a4..578c2b629397 100644 --- a/sys/arm64/arm64/identcpu.c +++ b/sys/arm64/arm64/identcpu.c @@ -1453,10 +1453,47 @@ static const struct mrs_field id_aa64pfr0_fields[] = { /* ID_AA64PFR1_EL1 */ +static const struct mrs_field_value id_aa64pfr1_nmi[] = { + MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR1, NMI, NONE, IMPL), + MRS_FIELD_VALUE_END, +}; + +static const struct mrs_field_value id_aa64pfr1_csv2_frac[] = { + MRS_FIELD_VALUE(ID_AA64PFR1_CSV2_frac_p0, ""), + MRS_FIELD_VALUE(ID_AA64PFR1_CSV2_frac_p1, "CSV2 p1"), + MRS_FIELD_VALUE(ID_AA64PFR1_CSV2_frac_p2, "CSV2 p2"), + MRS_FIELD_VALUE_END, +}; + +static const struct mrs_field_value id_aa64pfr1_rndr_trap[] = { + MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR1, RNDR_trap, NONE, IMPL), + MRS_FIELD_VALUE_END, +}; + +static const struct mrs_field_value id_aa64pfr1_sme[] = { + MRS_FIELD_VALUE(ID_AA64PFR1_SME_NONE, ""), + MRS_FIELD_VALUE(ID_AA64PFR1_SME_SME, "SME"), + MRS_FIELD_VALUE(ID_AA64PFR1_SME_SME2, "SME2"), + MRS_FIELD_VALUE_END, +}; + +static const struct mrs_field_value id_aa64pfr1_mpam_frac[] = { + MRS_FIELD_VALUE(ID_AA64PFR1_MPAM_frac_p0, ""), + MRS_FIELD_VALUE(ID_AA64PFR1_MPAM_frac_p1, "MPAM p1"), + MRS_FIELD_VALUE_END, +}; + +static const struct mrs_field_value id_aa64pfr1_ras_frac[] = { + MRS_FIELD_VALUE(ID_AA64PFR1_RAS_frac_p0, ""), + MRS_FIELD_VALUE(ID_AA64PFR1_RAS_frac_p1, "RAS p1"), + MRS_FIELD_VALUE_END, +}; + static const struct mrs_field_value id_aa64pfr1_mte[] = { MRS_FIELD_VALUE(ID_AA64PFR1_MTE_NONE, ""), - MRS_FIELD_VALUE(ID_AA64PFR1_MTE_IMPL_EL0, "MTE EL0"), - MRS_FIELD_VALUE(ID_AA64PFR1_MTE_IMPL, "MTE"), + MRS_FIELD_VALUE(ID_AA64PFR1_MTE_MTE, "MTE"), + MRS_FIELD_VALUE(ID_AA64PFR1_MTE_MTE2, "MTE2"), + MRS_FIELD_VALUE(ID_AA64PFR1_MTE_MTE3, "MTE3"), MRS_FIELD_VALUE_END, }; @@ -1487,6 +1524,16 @@ static const struct mrs_field_hwcap id_aa64pfr1_bt_caps[] = { #endif static const struct mrs_field id_aa64pfr1_fields[] = { + MRS_FIELD(ID_AA64PFR1, NMI, false, MRS_EXACT, id_aa64pfr1_nmi), + MRS_FIELD(ID_AA64PFR1, CSV2_frac, false, MRS_EXACT, + id_aa64pfr1_csv2_frac), + MRS_FIELD(ID_AA64PFR1, RNDR_trap, false, MRS_EXACT, + id_aa64pfr1_rndr_trap), + MRS_FIELD(ID_AA64PFR1, SME, false, MRS_EXACT, id_aa64pfr1_sme), + MRS_FIELD(ID_AA64PFR1, MPAM_frac, false, MRS_EXACT, + id_aa64pfr1_mpam_frac), + MRS_FIELD(ID_AA64PFR1, RAS_frac, false, MRS_EXACT, + id_aa64pfr1_ras_frac), MRS_FIELD(ID_AA64PFR1, MTE, false, MRS_EXACT, id_aa64pfr1_mte), MRS_FIELD_HWCAP(ID_AA64PFR1, SSBS, false, MRS_LOWER, id_aa64pfr1_ssbs, id_aa64pfr1_ssbs_caps), diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index f39fcfde0eaa..7624adf9eee4 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -1202,11 +1202,11 @@ /* ID_AA64PFR1_EL1 */ #define ID_AA64PFR1_EL1 MRS_REG(ID_AA64PFR1_EL1) -#define ID_AA64PFR1_EL1_op0 0x3 -#define ID_AA64PFR1_EL1_op1 0x0 -#define ID_AA64PFR1_EL1_CRn 0x0 -#define ID_AA64PFR1_EL1_CRm 0x4 -#define ID_AA64PFR1_EL1_op2 0x1 +#define ID_AA64PFR1_EL1_op0 3 +#define ID_AA64PFR1_EL1_op1 0 +#define ID_AA64PFR1_EL1_CRn 0 +#define ID_AA64PFR1_EL1_CRm 4 +#define ID_AA64PFR1_EL1_op2 1 #define ID_AA64PFR1_BT_SHIFT 0 #define ID_AA64PFR1_BT_MASK (UL(0xf) << ID_AA64PFR1_BT_SHIFT) #define ID_AA64PFR1_BT_VAL(x) ((x) & ID_AA64PFR1_BT_MASK) @@ -1222,13 +1222,41 @@ #define ID_AA64PFR1_MTE_MASK (UL(0xf) << ID_AA64PFR1_MTE_SHIFT) #define ID_AA64PFR1_MTE_VAL(x) ((x) & ID_AA64PFR1_MTE_MASK) #define ID_AA64PFR1_MTE_NONE (UL(0x0) << ID_AA64PFR1_MTE_SHIFT) -#define ID_AA64PFR1_MTE_IMPL_EL0 (UL(0x1) << ID_AA64PFR1_MTE_SHIFT) -#define ID_AA64PFR1_MTE_IMPL (UL(0x2) << ID_AA64PFR1_MTE_SHIFT) +#define ID_AA64PFR1_MTE_MTE (UL(0x1) << ID_AA64PFR1_MTE_SHIFT) +#define ID_AA64PFR1_MTE_MTE2 (UL(0x2) << ID_AA64PFR1_MTE_SHIFT) +#define ID_AA64PFR1_MTE_MTE3 (UL(0x3) << ID_AA64PFR1_MTE_SHIFT) #define ID_AA64PFR1_RAS_frac_SHIFT 12 #define ID_AA64PFR1_RAS_frac_MASK (UL(0xf) << ID_AA64PFR1_RAS_frac_SHIFT) #define ID_AA64PFR1_RAS_frac_VAL(x) ((x) & ID_AA64PFR1_RAS_frac_MASK) -#define ID_AA64PFR1_RAS_frac_V1 (UL(0x0) << ID_AA64PFR1_RAS_frac_SHIFT) -#define ID_AA64PFR1_RAS_frac_V2 (UL(0x1) << ID_AA64PFR1_RAS_frac_SHIFT) +#define ID_AA64PFR1_RAS_frac_p0 (UL(0x0) << ID_AA64PFR1_RAS_frac_SHIFT) +#define ID_AA64PFR1_RAS_frac_p1 (UL(0x1) << ID_AA64PFR1_RAS_frac_SHIFT) +#define ID_AA64PFR1_MPAM_frac_SHIFT 16 +#define ID_AA64PFR1_MPAM_frac_MASK (UL(0xf) << ID_AA64PFR1_MPAM_frac_SHIFT) +#define ID_AA64PFR1_MPAM_frac_VAL(x) ((x) & ID_AA64PFR1_MPAM_frac_MASK) +#define ID_AA64PFR1_MPAM_frac_p0 (UL(0x0) << ID_AA64PFR1_MPAM_frac_SHIFT) +#define ID_AA64PFR1_MPAM_frac_p1 (UL(0x1) << ID_AA64PFR1_MPAM_frac_SHIFT) +#define ID_AA64PFR1_SME_SHIFT 24 +#define ID_AA64PFR1_SME_MASK (UL(0xf) << ID_AA64PFR1_SME_SHIFT) +#define ID_AA64PFR1_SME_VAL(x) ((x) & ID_AA64PFR1_SME_MASK) +#define ID_AA64PFR1_SME_NONE (UL(0x0) << ID_AA64PFR1_SME_SHIFT) +#define ID_AA64PFR1_SME_SME (UL(0x1) << ID_AA64PFR1_SME_SHIFT) +#define ID_AA64PFR1_SME_SME2 (UL(0x2) << ID_AA64PFR1_SME_SHIFT) +#define ID_AA64PFR1_RNDR_trap_SHIFT 28 +#define ID_AA64PFR1_RNDR_trap_MASK (UL(0xf) << ID_AA64PFR1_RNDR_trap_SHIFT) +#define ID_AA64PFR1_RNDR_trap_VAL(x) ((x) & ID_AA64PFR1_RNDR_trap_MASK) +#define ID_AA64PFR1_RNDR_trap_NONE (UL(0x0) << ID_AA64PFR1_RNDR_trap_SHIFT) +#define ID_AA64PFR1_RNDR_trap_IMPL (UL(0x1) << ID_AA64PFR1_RNDR_trap_SHIFT) +#define ID_AA64PFR1_CSV2_frac_SHIFT 32 +#define ID_AA64PFR1_CSV2_frac_MASK (UL(0xf) << ID_AA64PFR1_CSV2_frac_SHIFT) +#define ID_AA64PFR1_CSV2_frac_VAL(x) ((x) & ID_AA64PFR1_CSV2_frac_MASK) +#define ID_AA64PFR1_CSV2_frac_p0 (UL(0x0) << ID_AA64PFR1_CSV2_frac_SHIFT) +#define ID_AA64PFR1_CSV2_frac_p1 (UL(0x1) << ID_AA64PFR1_CSV2_frac_SHIFT) +#define ID_AA64PFR1_CSV2_frac_p2 (UL(0x2) << ID_AA64PFR1_CSV2_frac_SHIFT) +#define ID_AA64PFR1_NMI_SHIFT 36 +#define ID_AA64PFR1_NMI_MASK (UL(0xf) << ID_AA64PFR1_NMI_SHIFT) +#define ID_AA64PFR1_NMI_VAL(x) ((x) & ID_AA64PFR1_NMI_MASK) +#define ID_AA64PFR1_NMI_NONE (UL(0x0) << ID_AA64PFR1_NMI_SHIFT) +#define ID_AA64PFR1_NMI_IMPL (UL(0x1) << ID_AA64PFR1_NMI_SHIFT) /* ID_AA64ZFR0_EL1 */ #define ID_AA64ZFR0_EL1 MRS_REG(ID_AA64ZFR0_EL1)