git: 8d2c13931b7e - main - cxgbe/tom: Fix assertions in the code that maintains TCB history.
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Date: Thu, 29 Sep 2022 05:47:26 UTC
The branch main has been updated by np: URL: https://cgit.FreeBSD.org/src/commit/?id=8d2c13931b7e4897ca5d73af57f4cf35e440ec54 commit 8d2c13931b7e4897ca5d73af57f4cf35e440ec54 Author: Navdeep Parhar <np@FreeBSD.org> AuthorDate: 2022-09-29 02:56:14 +0000 Commit: Navdeep Parhar <np@FreeBSD.org> CommitDate: 2022-09-29 03:01:14 +0000 cxgbe/tom: Fix assertions in the code that maintains TCB history. The tids used for TOE connections start from tid_base, not 0. MFC after: 1 week Sponsored by: Chelsio Communications --- sys/dev/cxgbe/tom/t4_tom.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/sys/dev/cxgbe/tom/t4_tom.c b/sys/dev/cxgbe/tom/t4_tom.c index 825a4e96ce81..dd214e91f0b3 100644 --- a/sys/dev/cxgbe/tom/t4_tom.c +++ b/sys/dev/cxgbe/tom/t4_tom.c @@ -474,7 +474,8 @@ send_get_tcb(struct adapter *sc, u_int tid) struct cpl_get_tcb *cpl; struct wrq_cookie cookie; - MPASS(tid < sc->tids.ntids); + MPASS(tid >= sc->tids.tid_base); + MPASS(tid - sc->tids.tid_base < sc->tids.ntids); cpl = start_wrq_wr(&sc->sge.ctrlq[0], howmany(sizeof(*cpl), 16), &cookie); @@ -527,7 +528,8 @@ add_tid_to_history(struct adapter *sc, u_int tid) struct tom_data *td = sc->tom_softc; int rc; - MPASS(tid < sc->tids.ntids); + MPASS(tid >= sc->tids.tid_base); + MPASS(tid - sc->tids.tid_base < sc->tids.ntids); if (td->tcb_history == NULL) return (ENXIO); @@ -577,7 +579,8 @@ lookup_tcb_histent(struct adapter *sc, u_int tid, bool addrem) struct tcb_histent *te; struct tom_data *td = sc->tom_softc; - MPASS(tid < sc->tids.ntids); + MPASS(tid >= sc->tids.tid_base); + MPASS(tid - sc->tids.tid_base < sc->tids.ntids); if (td->tcb_history == NULL) return (NULL); @@ -769,7 +772,8 @@ read_tcb_using_memwin(struct adapter *sc, u_int tid, uint64_t *buf) uint32_t addr; u_char *tcb, tmp; - MPASS(tid < sc->tids.ntids); + MPASS(tid >= sc->tids.tid_base); + MPASS(tid - sc->tids.tid_base < sc->tids.ntids); addr = t4_read_reg(sc, A_TP_CMM_TCB_BASE) + tid * TCB_SIZE; rc = read_via_memwin(sc, 2, addr, (uint32_t *)buf, TCB_SIZE);