git: 78ee8d1c4cda - main - qat: Import a new Intel (R) QAT driver
Date: Wed, 27 Jul 2022 15:14:05 UTC
The branch main has been updated by markj:
URL: https://cgit.FreeBSD.org/src/commit/?id=78ee8d1c4cdad7a56dbf50f1c8ade75531ce620c
commit 78ee8d1c4cdad7a56dbf50f1c8ade75531ce620c
Author: Julian Grajkowski <julianx.grajkowski@intel.com>
AuthorDate: 2022-07-19 08:15:34 +0000
Commit: Mark Johnston <markj@FreeBSD.org>
CommitDate: 2022-07-27 15:12:35 +0000
qat: Import a new Intel (R) QAT driver
QAT in-tree driver ported from out-of-tree release available
from 01.org.
The driver exposes complete cryptography and data compression
API in the kernel and integrates with Open Crypto Framework.
Details of supported operations, devices and usage can be found
in man and on 01.org.
Patch co-authored by: Krzysztof Zdziarski <krzysztofx.zdziarski@intel.com>
Patch co-authored by: Michal Jaraczewski <michalx.jaraczewski@intel.com>
Patch co-authored by: Michal Gulbicki <michalx.gulbicki@intel.com>
Patch co-authored by: Julian Grajkowski <julianx.grajkowski@intel.com>
Patch co-authored by: Piotr Kasierski <piotrx.kasierski@intel.com>
Patch co-authored by: Adam Czupryna <adamx.czupryna@intel.com>
Patch co-authored by: Konrad Zelazny <konradx.zelazny@intel.com>
Patch co-authored by: Katarzyna Rucinska <katarzynax.kargol@intel.com>
Patch co-authored by: Lukasz Kolodzinski <lukaszx.kolodzinski@intel.com>
Patch co-authored by: Zbigniew Jedlinski <zbigniewx.jedlinski@intel.com>
Reviewed by: markj, jhb (OCF integration)
Reviewed by: debdrup, pauamma (docs)
Sponsored by: Intel Corporation
Differential Revision: https://reviews.freebsd.org/D34632
---
share/man/man4/qat.4 | 127 +
sys/contrib/dev/qat/LICENSE | 46 +-
sys/contrib/dev/qat/qat_200xx.bin | Bin 0 -> 1062072 bytes
sys/contrib/dev/qat/qat_200xx_mmp.bin | Bin 0 -> 120452 bytes
sys/contrib/dev/qat/qat_895xcc.bin | Bin 0 -> 1321568 bytes
sys/contrib/dev/qat/qat_895xcc_mmp.bin | Bin 0 -> 119808 bytes
sys/contrib/dev/qat/qat_c3xxx.bin | Bin 0 -> 1062072 bytes
sys/contrib/dev/qat/qat_c3xxx_mmp.bin | Bin 0 -> 120452 bytes
sys/contrib/dev/qat/qat_c4xxx.bin | Bin 0 -> 4777880 bytes
sys/contrib/dev/qat/qat_c4xxx_mmp.bin | Bin 0 -> 127044 bytes
sys/contrib/dev/qat/qat_c62x.bin | Bin 0 -> 1592872 bytes
sys/contrib/dev/qat/qat_c62x_mmp.bin | Bin 0 -> 120452 bytes
sys/dev/qat/include/adf_cfg_dev_dbg.h | 12 +
sys/dev/qat/include/adf_cfg_device.h | 75 +
sys/dev/qat/include/adf_cnvnr_freq_counters.h | 11 +
sys/dev/qat/include/adf_dev_err.h | 80 +
sys/dev/qat/include/adf_freebsd_pfvf_ctrs_dbg.h | 10 +
sys/dev/qat/include/adf_fw_counters.h | 40 +
sys/dev/qat/include/adf_heartbeat.h | 33 +
sys/dev/qat/include/adf_heartbeat_dbg.h | 11 +
sys/dev/qat/include/adf_pf2vf_msg.h | 182 +
sys/dev/qat/include/adf_ver_dbg.h | 11 +
sys/dev/qat/include/common/adf_accel_devices.h | 585 ++
sys/dev/qat/include/common/adf_cfg.h | 79 +
sys/dev/qat/include/common/adf_cfg_common.h | 211 +
sys/dev/qat/include/common/adf_cfg_strings.h | 132 +
sys/dev/qat/include/common/adf_cfg_user.h | 46 +
sys/dev/qat/include/common/adf_common_drv.h | 368 ++
sys/dev/qat/include/common/adf_transport.h | 27 +
.../include/common/adf_transport_access_macros.h | 169 +
.../qat/include/common/adf_transport_internal.h | 58 +
.../qat/include/common/icp_qat_fw_loader_handle.h | 53 +
sys/dev/qat/include/common/icp_qat_hal.h | 196 +
sys/dev/qat/include/common/icp_qat_uclo.h | 558 ++
sys/dev/qat/include/common/qat_freebsd.h | 156 +
.../qat/include/common/sal_statistics_strings.h | 33 +
sys/dev/qat/include/icp_qat_fw.h | 292 +
sys/dev/qat/include/icp_qat_fw_init_admin.h | 222 +
sys/dev/qat/include/icp_qat_hw.h | 326 ++
sys/dev/qat/include/qat_ocf_mem_pool.h | 142 +
sys/dev/qat/include/qat_ocf_utils.h | 61 +
sys/dev/qat/qat/qat_ocf.c | 1228 ++++
sys/dev/qat/qat/qat_ocf_mem_pool.c | 564 ++
sys/dev/qat/qat/qat_ocf_utils.c | 172 +
.../qat/qat_api/common/compression/dc_buffers.c | 116 +
.../qat/qat_api/common/compression/dc_datapath.c | 1790 ++++++
sys/dev/qat/qat_api/common/compression/dc_dp.c | 545 ++
.../qat_api/common/compression/dc_header_footer.c | 237 +
.../qat/qat_api/common/compression/dc_session.c | 957 ++++
sys/dev/qat/qat_api/common/compression/dc_stats.c | 90 +
.../qat_api/common/compression/icp_sal_dc_err.c | 33 +
.../common/compression/include/dc_datapath.h | 186 +
.../common/compression/include/dc_error_counter.h | 25 +
.../common/compression/include/dc_header_footer.h | 44 +
.../common/compression/include/dc_session.h | 278 +
.../qat_api/common/compression/include/dc_stats.h | 81 +
.../common/crypto/sym/include/lac_session.h | 622 ++
.../qat_api/common/crypto/sym/include/lac_sym.h | 356 ++
.../common/crypto/sym/include/lac_sym_alg_chain.h | 294 +
.../common/crypto/sym/include/lac_sym_auth_enc.h | 87 +
.../qat_api/common/crypto/sym/include/lac_sym_cb.h | 55 +
.../common/crypto/sym/include/lac_sym_cipher.h | 312 ++
.../crypto/sym/include/lac_sym_cipher_defs.h | 182 +
.../common/crypto/sym/include/lac_sym_hash.h | 559 ++
.../common/crypto/sym/include/lac_sym_hash_defs.h | 344 ++
.../crypto/sym/include/lac_sym_hash_precomputes.h | 176 +
.../common/crypto/sym/include/lac_sym_key.h | 184 +
.../common/crypto/sym/include/lac_sym_partial.h | 121 +
.../common/crypto/sym/include/lac_sym_qat.h | 209 +
.../common/crypto/sym/include/lac_sym_qat_cipher.h | 291 +
.../common/crypto/sym/include/lac_sym_qat_hash.h | 309 +
.../sym/include/lac_sym_qat_hash_defs_lookup.h | 139 +
.../common/crypto/sym/include/lac_sym_qat_key.h | 189 +
.../common/crypto/sym/include/lac_sym_queue.h | 51 +
.../common/crypto/sym/include/lac_sym_stats.h | 191 +
.../qat_api/common/crypto/sym/key/lac_sym_key.c | 3021 ++++++++++
.../qat_api/common/crypto/sym/lac_sym_alg_chain.c | 1860 ++++++
.../qat/qat_api/common/crypto/sym/lac_sym_api.c | 1130 ++++
.../qat_api/common/crypto/sym/lac_sym_auth_enc.c | 197 +
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_cb.c | 545 ++
.../qat/qat_api/common/crypto/sym/lac_sym_cipher.c | 416 ++
.../common/crypto/sym/lac_sym_compile_check.c | 45 +
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_dp.c | 1080 ++++
.../qat/qat_api/common/crypto/sym/lac_sym_hash.c | 783 +++
.../crypto/sym/lac_sym_hash_sw_precomputes.c | 353 ++
.../qat_api/common/crypto/sym/lac_sym_partial.c | 75 +
.../qat/qat_api/common/crypto/sym/lac_sym_queue.c | 165 +
.../qat/qat_api/common/crypto/sym/lac_sym_stats.c | 139 +
.../qat_api/common/crypto/sym/qat/lac_sym_qat.c | 227 +
.../common/crypto/sym/qat/lac_sym_qat_cipher.c | 889 +++
.../common/crypto/sym/qat/lac_sym_qat_hash.c | 942 ++++
.../crypto/sym/qat/lac_sym_qat_hash_defs_lookup.c | 491 ++
.../common/crypto/sym/qat/lac_sym_qat_key.c | 196 +
sys/dev/qat/qat_api/common/ctrl/sal_compression.c | 1554 +++++
.../qat/qat_api/common/ctrl/sal_create_services.c | 105 +
sys/dev/qat/qat_api/common/ctrl/sal_crypto.c | 1837 ++++++
.../qat/qat_api/common/ctrl/sal_ctrl_services.c | 1344 +++++
sys/dev/qat/qat_api/common/ctrl/sal_list.c | 99 +
.../qat/qat_api/common/include/lac_buffer_desc.h | 252 +
sys/dev/qat/qat_api/common/include/lac_common.h | 847 +++
sys/dev/qat/qat_api/common/include/lac_hooks.h | 234 +
sys/dev/qat/qat_api/common/include/lac_list.h | 137 +
sys/dev/qat/qat_api/common/include/lac_log.h | 46 +
sys/dev/qat/qat_api/common/include/lac_mem.h | 577 ++
sys/dev/qat/qat_api/common/include/lac_mem_pools.h | 278 +
sys/dev/qat/qat_api/common/include/lac_module.h | 13 +
sys/dev/qat/qat_api/common/include/lac_sal.h | 498 ++
sys/dev/qat/qat_api/common/include/lac_sal_ctrl.h | 100 +
sys/dev/qat/qat_api/common/include/lac_sal_types.h | 198 +
.../qat_api/common/include/lac_sal_types_crypto.h | 179 +
sys/dev/qat/qat_api/common/include/lac_sync.h | 376 ++
.../qat/qat_api/common/include/sal_qat_cmn_msg.h | 209 +
.../qat/qat_api/common/include/sal_service_state.h | 94 +
.../qat/qat_api/common/include/sal_statistics.h | 102 +
.../qat/qat_api/common/include/sal_string_parse.h | 66 +
.../qat_api/common/include/sal_types_compression.h | 150 +
.../qat/qat_api/common/qat_comms/sal_qat_cmn_msg.c | 219 +
sys/dev/qat/qat_api/common/stubs/lac_stubs.c | 413 ++
sys/dev/qat/qat_api/common/utils/lac_buffer_desc.c | 492 ++
.../qat/qat_api/common/utils/lac_lock_free_stack.h | 87 +
sys/dev/qat/qat_api/common/utils/lac_mem.c | 118 +
sys/dev/qat/qat_api/common/utils/lac_mem_pools.c | 430 ++
sys/dev/qat/qat_api/common/utils/lac_sync.c | 123 +
.../qat/qat_api/common/utils/sal_service_state.c | 46 +
sys/dev/qat/qat_api/common/utils/sal_statistics.c | 203 +
.../qat/qat_api/common/utils/sal_string_parse.c | 59 +
.../qat/qat_api/common/utils/sal_user_process.c | 84 +
sys/dev/qat/qat_api/common/utils/sal_versions.c | 177 +
sys/dev/qat/qat_api/device/dev_info.c | 135 +
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h | 1333 +++++
.../qat/qat_api/firmware/include/icp_qat_fw_comp.h | 1029 ++++
.../qat/qat_api/firmware/include/icp_qat_fw_la.h | 2280 ++++++++
.../qat/qat_api/firmware/include/icp_qat_fw_mmp.h | 5926 ++++++++++++++++++++
.../qat_api/firmware/include/icp_qat_fw_mmp_ids.h | 1555 +++++
.../qat/qat_api/firmware/include/icp_qat_fw_pke.h | 418 ++
sys/dev/qat/qat_api/firmware/include/icp_qat_hw.h | 1552 +++++
sys/dev/qat/qat_api/freebsd_module.c | 68 +
sys/dev/qat/qat_api/include/cpa.h | 677 +++
sys/dev/qat/qat_api/include/cpa_dev.h | 144 +
sys/dev/qat/qat_api/include/cpa_types.h | 244 +
sys/dev/qat/qat_api/include/dc/cpa_dc.h | 2461 ++++++++
sys/dev/qat/qat_api/include/dc/cpa_dc_bp.h | 320 ++
sys/dev/qat/qat_api/include/dc/cpa_dc_dp.h | 746 +++
sys/dev/qat/qat_api/include/icp_buffer_desc.h | 77 +
sys/dev/qat/qat_api/include/icp_sal.h | 40 +
sys/dev/qat/qat_api/include/icp_sal_iommu.h | 84 +
sys/dev/qat/qat_api/include/icp_sal_nrbg_ht.h | 66 +
sys/dev/qat/qat_api/include/icp_sal_poll.h | 366 ++
sys/dev/qat/qat_api/include/icp_sal_user.h | 871 +++
sys/dev/qat/qat_api/include/icp_sal_versions.h | 97 +
sys/dev/qat/qat_api/include/lac/cpa_cy_common.h | 649 +++
sys/dev/qat/qat_api/include/lac/cpa_cy_dh.h | 514 ++
sys/dev/qat/qat_api/include/lac/cpa_cy_dsa.h | 1443 +++++
sys/dev/qat/qat_api/include/lac/cpa_cy_ec.h | 766 +++
sys/dev/qat/qat_api/include/lac/cpa_cy_ecdh.h | 358 ++
sys/dev/qat/qat_api/include/lac/cpa_cy_ecdsa.h | 839 +++
sys/dev/qat/qat_api/include/lac/cpa_cy_im.h | 339 ++
sys/dev/qat/qat_api/include/lac/cpa_cy_key.h | 1207 ++++
sys/dev/qat/qat_api/include/lac/cpa_cy_ln.h | 519 ++
sys/dev/qat/qat_api/include/lac/cpa_cy_prime.h | 450 ++
sys/dev/qat/qat_api/include/lac/cpa_cy_rsa.h | 907 +++
sys/dev/qat/qat_api/include/lac/cpa_cy_sym.h | 1844 ++++++
sys/dev/qat/qat_api/include/lac/cpa_cy_sym_dp.h | 986 ++++
.../qat_api/qat_direct/include/adf_kernel_types.h | 20 +
.../qat_api/qat_direct/include/icp_accel_devices.h | 157 +
.../qat_api/qat_direct/include/icp_adf_accel_mgr.h | 172 +
.../qat/qat_api/qat_direct/include/icp_adf_cfg.h | 127 +
.../qat/qat_api/qat_direct/include/icp_adf_debug.h | 136 +
.../qat/qat_api/qat_direct/include/icp_adf_esram.h | 30 +
.../qat/qat_api/qat_direct/include/icp_adf_init.h | 215 +
.../qat/qat_api/qat_direct/include/icp_adf_poll.h | 52 +
.../qat_api/qat_direct/include/icp_adf_transport.h | 286 +
.../qat_direct/include/icp_adf_transport_dp.h | 82 +
.../qat_kernel/src/lac_adf_interface_freebsd.c | 424 ++
sys/dev/qat/qat_api/qat_kernel/src/lac_symbols.c | 74 +
sys/dev/qat/qat_api/qat_kernel/src/qat_transport.c | 426 ++
sys/dev/qat/qat_api/qat_utils/include/qat_utils.h | 851 +++
sys/dev/qat/qat_api/qat_utils/src/QatUtilsAtomic.c | 78 +
sys/dev/qat/qat_api/qat_utils/src/QatUtilsCrypto.c | 152 +
.../qat/qat_api/qat_utils/src/QatUtilsSemaphore.c | 169 +
.../qat/qat_api/qat_utils/src/QatUtilsServices.c | 113 +
.../qat/qat_api/qat_utils/src/QatUtilsSpinLock.c | 45 +
sys/dev/qat/qat_common/adf_accel_engine.c | 267 +
sys/dev/qat/qat_common/adf_aer.c | 342 ++
sys/dev/qat/qat_common/adf_cfg.c | 574 ++
sys/dev/qat/qat_common/adf_cfg_bundle.c | 377 ++
sys/dev/qat/qat_common/adf_cfg_bundle.h | 55 +
sys/dev/qat/qat_common/adf_cfg_device.c | 1102 ++++
sys/dev/qat/qat_common/adf_cfg_instance.c | 156 +
sys/dev/qat/qat_common/adf_cfg_instance.h | 19 +
sys/dev/qat/qat_common/adf_cfg_section.c | 1144 ++++
sys/dev/qat/qat_common/adf_cfg_section.h | 19 +
sys/dev/qat/qat_common/adf_clock.c | 187 +
sys/dev/qat/qat_common/adf_dev_err.c | 319 ++
sys/dev/qat/qat_common/adf_dev_mgr.c | 406 ++
sys/dev/qat/qat_common/adf_freebsd_admin.c | 602 ++
sys/dev/qat/qat_common/adf_freebsd_cfg_dev_dbg.c | 78 +
.../qat/qat_common/adf_freebsd_cnvnr_ctrs_dbg.c | 179 +
sys/dev/qat/qat_common/adf_freebsd_heartbeat_dbg.c | 106 +
sys/dev/qat/qat_common/adf_freebsd_pfvf_ctrs_dbg.c | 137 +
.../qat/qat_common/adf_freebsd_transport_debug.c | 209 +
sys/dev/qat/qat_common/adf_freebsd_ver_dbg.c | 149 +
sys/dev/qat/qat_common/adf_fw_counters.c | 411 ++
sys/dev/qat/qat_common/adf_heartbeat.c | 213 +
sys/dev/qat/qat_common/adf_hw_arbiter.c | 186 +
sys/dev/qat/qat_common/adf_init.c | 730 +++
sys/dev/qat/qat_common/adf_isr.c | 345 ++
sys/dev/qat/qat_common/adf_pf2vf_capabilities.c | 147 +
sys/dev/qat/qat_common/adf_pf2vf_msg.c | 896 +++
sys/dev/qat/qat_common/adf_pf2vf_ring_to_svc_map.c | 74 +
sys/dev/qat/qat_common/adf_transport.c | 747 +++
sys/dev/qat/qat_common/adf_vf2pf_msg.c | 275 +
sys/dev/qat/qat_common/adf_vf_isr.c | 393 ++
sys/dev/qat/qat_common/qat_common_module.c | 46 +
sys/dev/qat/qat_common/qat_freebsd.c | 135 +
sys/dev/qat/qat_common/qat_hal.c | 1848 ++++++
sys/dev/qat/qat_common/qat_uclo.c | 2188 ++++++++
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c | 541 ++
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h | 128 +
sys/dev/qat/qat_hw/qat_200xx/adf_drv.c | 280 +
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c | 415 ++
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h | 127 +
sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c | 269 +
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ae_config.c | 167 +
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c | 2302 ++++++++
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h | 570 ++
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h | 599 ++
.../qat_hw/qat_c4xxx/adf_c4xxx_misc_error_stats.c | 106 +
.../qat_hw/qat_c4xxx/adf_c4xxx_misc_error_stats.h | 12 +
.../qat_hw/qat_c4xxx/adf_c4xxx_pke_replay_stats.c | 100 +
.../qat_hw/qat_c4xxx/adf_c4xxx_pke_replay_stats.h | 12 +
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c | 1345 +++++
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.h | 20 +
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c | 195 +
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.c | 94 +
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.h | 76 +
sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c | 268 +
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c | 420 ++
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h | 117 +
sys/dev/qat/qat_hw/qat_c62x/adf_drv.c | 270 +
.../qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c | 405 ++
.../qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h | 146 +
sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c | 262 +
sys/modules/Makefile | 2 +
sys/modules/qat/Makefile | 9 +
sys/modules/qat/qat/Makefile | 24 +
sys/modules/qat/qat_api/Makefile | 75 +
sys/modules/qat/qat_common/Makefile | 29 +
sys/modules/qat/qat_hw/Makefile | 27 +
sys/modules/qatfw/Makefile | 10 +-
sys/modules/qatfw/qat_200xx/Makefile | 10 +
sys/modules/qatfw/qat_c3xxx/Makefile | 10 +
sys/modules/qatfw/qat_c4xxx/Makefile | 10 +
sys/modules/qatfw/qat_c62x/Makefile | 10 +
sys/modules/qatfw/qat_dh895xcc/Makefile | 10 +
255 files changed, 99110 insertions(+), 11 deletions(-)
diff --git a/share/man/man4/qat.4 b/share/man/man4/qat.4
new file mode 100644
index 000000000000..c6082f873a44
--- /dev/null
+++ b/share/man/man4/qat.4
@@ -0,0 +1,127 @@
+.\" SPDX-License-Identifier: BSD-3-Clause
+.\" Copyright(c) 2007-2022 Intel Corporation
+.\" $FreeBSD$
+.Dd June 30, 2022
+.Dt QAT 4
+.Os
+.Sh NAME
+.Nm qat
+.Nd Intel (R) QuickAssist Technology (QAT) driver
+.Sh SYNOPSIS
+To load the driver call:
+.Pp
+.Bl -item -compact
+.It
+kldload qat
+.El
+.Pp
+In order to load the driver on boot add these lines to
+.Xr loader.conf 5 selecting firmware(s) suitable for installed device(s)
+.Pp
+.Bl -item -compact
+.It
+qat_200xx_fw_load="YES"
+.It
+qat_c3xxx_fw_load="YES"
+.It
+qat_c4xxx_fw_load="YES"
+.It
+qat_c62x_fw_load="YES"
+.It
+qat_dh895xcc_fw_load="YES"
+.It
+qat_load="YES"
+.El
+.Sh DESCRIPTION
+The
+.Nm
+driver supports cryptography and compression acceleration of the
+Intel (R) QuickAssist Technology (QAT) devices.
+.Pp
+The
+.Nm
+driver is intended for platforms that contain:
+.Bl -bullet -compact
+.It
+Intel (R) C62x Chipset
+.It
+Intel (R) Atom C3000 processor product family
+.It
+Intel (R) QuickAssist Adapter 8960/Intel (R) QuickAssist Adapter 8970
+(formerly known as "Lewis Hill")
+.It
+Intel (R) Communications Chipset 8925 to 8955 Series
+.It
+Intel (R) Atom P5300 processor product family
+.El
+.Pp
+The
+.Nm
+driver supports cryptography and compression acceleration.
+A complete API for offloading these operations is exposed in the kernel and may
+be used by any other entity directly.
+For details of usage and supported operations and algorithms refer to the
+following documentation available from
+.Lk 01.org :
+.Bl -bullet -compact
+.It
+.Rs
+.%A Intel (R)
+.%T QuickAssist Technology API Programmer's Guide
+.Re
+.It
+.Rs
+.%A Intel (R)
+.%T QuickAssist Technology Cryptographic API Reference Manual
+.Re
+.It
+.Rs
+.%A Intel (R)
+.%T QuickAssist Technology Data Compression API Reference Manual
+.Re
+.It
+.Rs
+.%A Intel (R)
+.%T QuickAssist Technology Performance Optimization Guide
+.Re
+.El
+.Pp
+In addition to exposing complete kernel API for offloading cryptography and
+compression operations, the
+.Nm
+driver also integrates with
+.Xr crypto 4 ,
+allowing offloading supported cryptography operations to Intel (R) QuickAssist
+Technology (QAT) devices.
+For details of usage and supported operations and algorithms refer to the
+documentation mentioned above and
+.Sx SEE ALSO
+section.
+.Sh COMPATIBILITY
+The
+.Nm
+driver replaced previous implementation introduced in
+.Fx 13.0 .
+Current version, in addition to
+.Xr crypto 4
+integration, supports also data compression and exposes a complete API for
+offloading data compression and cryptography operations.
+.Sh SEE ALSO
+.Xr crypto 4 ,
+.Xr ipsec 4 ,
+.Xr pci 4 ,
+.Xr crypto 7 ,
+.Xr crypto 9
+.Sh HISTORY
+This
+.Nm
+driver was introduced in
+.Fx 14.0 .
+.Fx 13.0 included a different version of
+.Nm
+driver.
+.Sh AUTHORS
+The
+.Nm
+driver was written by
+.An Intel (R) Corporation .
diff --git a/sys/contrib/dev/qat/LICENSE b/sys/contrib/dev/qat/LICENSE
index 266294fd4275..2d9af4268f0f 100644
--- a/sys/contrib/dev/qat/LICENSE
+++ b/sys/contrib/dev/qat/LICENSE
@@ -1,11 +1,39 @@
-Copyright (c) 2007-2016 Intel Corporation.
-All rights reserved.
-Redistribution. Redistribution and use in binary form, without modification, are permitted provided that the following conditions are met:
+Copyright (c) 2021 Intel Corporation
- Redistributions must reproduce the above copyright notice and the following disclaimer in the documentation and/or other materials provided with the distribution.
- Neither the name of Intel Corporation nor the names of its suppliers may be used to endorse or promote products derived from this software without specific prior written permission.
- No reverse engineering, decompilation, or disassembly of this software is permitted.
-
-Limited patent license. Intel Corporation grants a world-wide, royalty-free, non-exclusive license under patents it now or hereafter owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") this software, but solely to the extent that any such patent is necessary to Utilize the software alone. The patent license shall not apply to any combinations which include this software. No hardware per se is licensed hereunder.
+Redistribution. Redistribution and use in binary form, without
+modification, are permitted provided that the following conditions are
+met:
+
+* Redistributions must reproduce the above copyright notice and the
+ following disclaimer in the documentation and/or other materials
+ provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its suppliers
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+* No reverse engineering, decompilation, or disassembly of this software
+ is permitted.
+
+Limited patent license. Intel Corporation grants a world-wide,
+royalty-free, non-exclusive license under patents it now or hereafter
+owns or controls to make, have made, use, import, offer to sell and
+sell ("Utilize") this software, but solely to the extent that any
+such patent is necessary to Utilize the software alone, or in
+combination with an operating system licensed under an approved Open
+Source license as listed by the Open Source Initiative at
+http://opensource.org/licenses. The patent license shall not apply to
+any other combinations which include this software. No hardware per
+se is licensed hereunder.
+
+DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
+BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
+FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+DAMAGE.
-DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/sys/contrib/dev/qat/qat_200xx.bin b/sys/contrib/dev/qat/qat_200xx.bin
new file mode 100644
index 000000000000..8d1ba6ffc5f6
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diff --git a/sys/contrib/dev/qat/qat_200xx_mmp.bin b/sys/contrib/dev/qat/qat_200xx_mmp.bin
new file mode 100644
index 000000000000..0f1f811eef41
Binary files /dev/null and b/sys/contrib/dev/qat/qat_200xx_mmp.bin differ
diff --git a/sys/contrib/dev/qat/qat_895xcc.bin b/sys/contrib/dev/qat/qat_895xcc.bin
new file mode 100644
index 000000000000..a642e1dc73aa
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diff --git a/sys/contrib/dev/qat/qat_895xcc_mmp.bin b/sys/contrib/dev/qat/qat_895xcc_mmp.bin
new file mode 100644
index 000000000000..f2c0abe493cd
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diff --git a/sys/contrib/dev/qat/qat_c3xxx.bin b/sys/contrib/dev/qat/qat_c3xxx.bin
new file mode 100644
index 000000000000..8d1ba6ffc5f6
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diff --git a/sys/contrib/dev/qat/qat_c3xxx_mmp.bin b/sys/contrib/dev/qat/qat_c3xxx_mmp.bin
new file mode 100644
index 000000000000..0f1f811eef41
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diff --git a/sys/contrib/dev/qat/qat_c4xxx.bin b/sys/contrib/dev/qat/qat_c4xxx.bin
new file mode 100644
index 000000000000..040e31499911
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diff --git a/sys/contrib/dev/qat/qat_c4xxx_mmp.bin b/sys/contrib/dev/qat/qat_c4xxx_mmp.bin
new file mode 100644
index 000000000000..5a14ff1a47da
Binary files /dev/null and b/sys/contrib/dev/qat/qat_c4xxx_mmp.bin differ
diff --git a/sys/contrib/dev/qat/qat_c62x.bin b/sys/contrib/dev/qat/qat_c62x.bin
new file mode 100644
index 000000000000..85cb23892baa
Binary files /dev/null and b/sys/contrib/dev/qat/qat_c62x.bin differ
diff --git a/sys/contrib/dev/qat/qat_c62x_mmp.bin b/sys/contrib/dev/qat/qat_c62x_mmp.bin
new file mode 100644
index 000000000000..3c334a5d68f0
Binary files /dev/null and b/sys/contrib/dev/qat/qat_c62x_mmp.bin differ
diff --git a/sys/dev/qat/include/adf_cfg_dev_dbg.h b/sys/dev/qat/include/adf_cfg_dev_dbg.h
new file mode 100644
index 000000000000..2fc7884c10b2
--- /dev/null
+++ b/sys/dev/qat/include/adf_cfg_dev_dbg.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2022 Intel Corporation */
+/* $FreeBSD$ */
+#ifndef ADF_CFG_DEV_DBG_H_
+#define ADF_CFG_DEV_DBG_H_
+
+struct adf_accel_dev;
+
+int adf_cfg_dev_dbg_add(struct adf_accel_dev *accel_dev);
+void adf_cfg_dev_dbg_remove(struct adf_accel_dev *accel_dev);
+
+#endif /* ADF_CFG_DEV_DBG_H_ */
diff --git a/sys/dev/qat/include/adf_cfg_device.h b/sys/dev/qat/include/adf_cfg_device.h
new file mode 100644
index 000000000000..40fb91119f03
--- /dev/null
+++ b/sys/dev/qat/include/adf_cfg_device.h
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2022 Intel Corporation */
+/* $FreeBSD$ */
+#ifndef ADF_CFG_DEVICE_H_
+#define ADF_CFG_DEVICE_H_
+
+#include "adf_cfg.h"
+#include "sal_statistics_strings.h"
+
+#define ADF_CFG_STATIC_CONF_VER 2
+#define ADF_CFG_STATIC_CONF_CY_ASYM_RING_SIZE 64
+#define ADF_CFG_STATIC_CONF_CY_SYM_RING_SIZE 512
+#define ADF_CFG_STATIC_CONF_DC_INTER_BUF_SIZE 64
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_ENABLED 1
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DC 1
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DH 0
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DRBG 0
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DSA 0
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_ECC 0
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_KEYGEN 0
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_LN 0
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_PRIME 0
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_RSA 0
+#define ADF_CFG_STATIC_CONF_SAL_STATS_CFG_SYM 1
+#define ADF_CFG_STATIC_CONF_POLL 1
+#define ADF_CFG_STATIC_CONF_IRQ 0
+#define ADF_CFG_STATIC_CONF_AUTO_RESET 0
+#define ADF_CFG_STATIC_CONF_NUM_DC_ACCEL_UNITS 2
+#define ADF_CFG_STATIC_CONF_NUM_INLINE_ACCEL_UNITS 0
+#define ADF_CFG_STATIC_CONF_INST_NUM_DC 2
+#define ADF_CFG_STATIC_CONF_INST_NUM_CY_POLL 2
+#define ADF_CFG_STATIC_CONF_INST_NUM_CY_IRQ 2
+
+#define ADF_CFG_FW_STRING_TO_ID(str, acc, id) \
+ do { \
+ typeof(id) id_ = (id); \
+ typeof(str) str_; \
+ memcpy(str_, (str), sizeof(str_)); \
+ if (!strncmp(str_, \
+ ADF_SERVICES_DEFAULT, \
+ sizeof(ADF_SERVICES_DEFAULT))) \
+ *id_ = ADF_FW_IMAGE_DEFAULT; \
+ else if (!strncmp(str_, \
+ ADF_SERVICES_CRYPTO, \
+ sizeof(ADF_SERVICES_CRYPTO))) \
+ *id_ = ADF_FW_IMAGE_CRYPTO; \
+ else if (!strncmp(str_, \
+ ADF_SERVICES_COMPRESSION, \
+ sizeof(ADF_SERVICES_COMPRESSION))) \
+ *id_ = ADF_FW_IMAGE_COMPRESSION; \
+ else if (!strncmp(str_, \
+ ADF_SERVICES_CUSTOM1, \
+ sizeof(ADF_SERVICES_CUSTOM1))) \
+ *id_ = ADF_FW_IMAGE_CUSTOM1; \
+ else { \
+ *id_ = ADF_FW_IMAGE_DEFAULT; \
+ device_printf(GET_DEV(acc), \
+ "Invalid SerivesProfile: %s," \
+ "Using DEFAULT image\n", \
+ str_); \
+ } \
+ } while (0)
+
+int adf_cfg_get_ring_pairs(struct adf_cfg_device *device,
+ struct adf_cfg_instance *inst,
+ const char *process_name,
+ struct adf_accel_dev *accel_dev);
+
+int adf_cfg_device_init(struct adf_cfg_device *device,
+ struct adf_accel_dev *accel_dev);
+
+void adf_cfg_device_clear(struct adf_cfg_device *device,
+ struct adf_accel_dev *accel_dev);
+
+#endif
diff --git a/sys/dev/qat/include/adf_cnvnr_freq_counters.h b/sys/dev/qat/include/adf_cnvnr_freq_counters.h
new file mode 100644
index 000000000000..c9b38679aa4d
--- /dev/null
+++ b/sys/dev/qat/include/adf_cnvnr_freq_counters.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2022 Intel Corporation */
+/* $FreeBSD$ */
+#ifndef ADF_CNVNR_CTRS_DBG_H_
+#define ADF_CNVNR_CTRS_DBG_H_
+
+struct adf_accel_dev;
+int adf_cnvnr_freq_counters_add(struct adf_accel_dev *accel_dev);
+void adf_cnvnr_freq_counters_remove(struct adf_accel_dev *accel_dev);
+
+#endif /* ADF_CNVNR_CTRS_DBG_H_ */
diff --git a/sys/dev/qat/include/adf_dev_err.h b/sys/dev/qat/include/adf_dev_err.h
new file mode 100644
index 000000000000..b82f91eafc87
--- /dev/null
+++ b/sys/dev/qat/include/adf_dev_err.h
@@ -0,0 +1,80 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2022 Intel Corporation */
+/* $FreeBSD$ */
+#ifndef ADF_DEV_ERR_H_
+#define ADF_DEV_ERR_H_
+
+#include <sys/types.h>
+#include <dev/pci/pcivar.h>
+#include "adf_accel_devices.h"
+
+#define ADF_ERRSOU0 (0x3A000 + 0x00)
+#define ADF_ERRSOU1 (0x3A000 + 0x04)
+#define ADF_ERRSOU2 (0x3A000 + 0x08)
+#define ADF_ERRSOU3 (0x3A000 + 0x0C)
+#define ADF_ERRSOU4 (0x3A000 + 0xD0)
+#define ADF_ERRSOU5 (0x3A000 + 0xD8)
+#define ADF_ERRMSK0 (0x3A000 + 0x10)
+#define ADF_ERRMSK1 (0x3A000 + 0x14)
+#define ADF_ERRMSK2 (0x3A000 + 0x18)
+#define ADF_ERRMSK3 (0x3A000 + 0x1C)
+#define ADF_ERRMSK4 (0x3A000 + 0xD4)
+#define ADF_ERRMSK5 (0x3A000 + 0xDC)
+#define ADF_EMSK3_CPM0_MASK BIT(2)
+#define ADF_EMSK3_CPM1_MASK BIT(3)
+#define ADF_EMSK5_CPM2_MASK BIT(16)
+#define ADF_EMSK5_CPM3_MASK BIT(17)
+#define ADF_EMSK5_CPM4_MASK BIT(18)
+#define ADF_RICPPINTSTS (0x3A000 + 0x114)
+#define ADF_RIERRPUSHID (0x3A000 + 0x118)
+#define ADF_RIERRPULLID (0x3A000 + 0x11C)
+#define ADF_CPP_CFC_ERR_STATUS (0x30000 + 0xC04)
+#define ADF_CPP_CFC_ERR_PPID (0x30000 + 0xC08)
+#define ADF_TICPPINTSTS (0x3A400 + 0x13C)
+#define ADF_TIERRPUSHID (0x3A400 + 0x140)
+#define ADF_TIERRPULLID (0x3A400 + 0x144)
+#define ADF_SECRAMUERR (0x3AC00 + 0x04)
+#define ADF_SECRAMUERRAD (0x3AC00 + 0x0C)
+#define ADF_CPPMEMTGTERR (0x3AC00 + 0x10)
+#define ADF_ERRPPID (0x3AC00 + 0x14)
+#define ADF_INTSTATSSM(i) ((i)*0x4000 + 0x04)
+#define ADF_INTSTATSSM_SHANGERR BIT(13)
+#define ADF_PPERR(i) ((i)*0x4000 + 0x08)
+#define ADF_PPERRID(i) ((i)*0x4000 + 0x0C)
+#define ADF_CERRSSMSH(i) ((i)*0x4000 + 0x10)
+#define ADF_UERRSSMSH(i) ((i)*0x4000 + 0x18)
+#define ADF_UERRSSMSHAD(i) ((i)*0x4000 + 0x1C)
+#define ADF_SLICEHANGSTATUS(i) ((i)*0x4000 + 0x4C)
+#define ADF_SLICE_HANG_AUTH0_MASK BIT(0)
+#define ADF_SLICE_HANG_AUTH1_MASK BIT(1)
+#define ADF_SLICE_HANG_AUTH2_MASK BIT(2)
+#define ADF_SLICE_HANG_CPHR0_MASK BIT(4)
+#define ADF_SLICE_HANG_CPHR1_MASK BIT(5)
+#define ADF_SLICE_HANG_CPHR2_MASK BIT(6)
+#define ADF_SLICE_HANG_CMP0_MASK BIT(8)
+#define ADF_SLICE_HANG_CMP1_MASK BIT(9)
+#define ADF_SLICE_HANG_XLT0_MASK BIT(12)
+#define ADF_SLICE_HANG_XLT1_MASK BIT(13)
+#define ADF_SLICE_HANG_MMP0_MASK BIT(16)
+#define ADF_SLICE_HANG_MMP1_MASK BIT(17)
+#define ADF_SLICE_HANG_MMP2_MASK BIT(18)
+#define ADF_SLICE_HANG_MMP3_MASK BIT(19)
+#define ADF_SLICE_HANG_MMP4_MASK BIT(20)
+#define ADF_SSMWDT(i) ((i)*0x4000 + 0x54)
+#define ADF_SSMWDTPKE(i) ((i)*0x4000 + 0x58)
+#define ADF_SHINTMASKSSM(i) ((i)*0x4000 + 0x1018)
+#define ADF_ENABLE_SLICE_HANG 0x000000
+#define ADF_MAX_MMP (5)
+#define ADF_MMP_BASE(i) ((i)*0x1000 % 0x3800)
+#define ADF_CERRSSMMMP(i, n) ((i)*0x4000 + ADF_MMP_BASE(n) + 0x380)
+#define ADF_UERRSSMMMP(i, n) ((i)*0x4000 + ADF_MMP_BASE(n) + 0x388)
+#define ADF_UERRSSMMMPAD(i, n) ((i)*0x4000 + ADF_MMP_BASE(n) + 0x38C)
+
+bool adf_handle_slice_hang(struct adf_accel_dev *accel_dev,
+ u8 accel_num,
+ struct resource *csr,
+ u32 slice_hang_offset);
+bool adf_check_slice_hang(struct adf_accel_dev *accel_dev);
+void adf_print_err_registers(struct adf_accel_dev *accel_dev);
+
+#endif
diff --git a/sys/dev/qat/include/adf_freebsd_pfvf_ctrs_dbg.h b/sys/dev/qat/include/adf_freebsd_pfvf_ctrs_dbg.h
new file mode 100644
index 000000000000..d413279fc000
--- /dev/null
+++ b/sys/dev/qat/include/adf_freebsd_pfvf_ctrs_dbg.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2022 Intel Corporation */
+/* $FreeBSD$ */
+#ifndef ADF_PFVF_CTRS_DBG_H_
+#define ADF_PFVF_CTRS_DBG_H_
+
+struct adf_accel_dev;
+int adf_pfvf_ctrs_dbg_add(struct adf_accel_dev *accel_dev);
+
+#endif /* ADF_PFVF_CTRS_DBG_H_ */
diff --git a/sys/dev/qat/include/adf_fw_counters.h b/sys/dev/qat/include/adf_fw_counters.h
new file mode 100644
index 000000000000..5fddb72eec33
--- /dev/null
+++ b/sys/dev/qat/include/adf_fw_counters.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2022 Intel Corporation */
+/* $FreeBSD$ */
+#ifndef ADF_FW_COUNTERS_H_
+#define ADF_FW_COUNTERS_H_
+
+#include <linux/rwsem.h>
+#include "adf_accel_devices.h"
+
+#define FW_COUNTERS_MAX_STR_LEN 64
+#define FW_COUNTERS_MAX_KEY_LEN_IN_BYTES FW_COUNTERS_MAX_STR_LEN
+#define FW_COUNTERS_MAX_VAL_LEN_IN_BYTES FW_COUNTERS_MAX_STR_LEN
+#define FW_COUNTERS_MAX_SECTION_LEN_IN_BYTES FW_COUNTERS_MAX_STR_LEN
+#define ADF_FW_COUNTERS_NO_RESPONSE -1
+
+struct adf_fw_counters_val {
+ char key[FW_COUNTERS_MAX_KEY_LEN_IN_BYTES];
+ char val[FW_COUNTERS_MAX_VAL_LEN_IN_BYTES];
+ struct list_head list;
+};
+
+struct adf_fw_counters_section {
+ char name[FW_COUNTERS_MAX_SECTION_LEN_IN_BYTES];
+ struct list_head list;
+ struct list_head param_head;
+};
+
+struct adf_fw_counters_data {
+ struct list_head ae_sec_list;
+ struct sysctl_oid *debug;
+ struct rw_semaphore lock;
+};
+
+int adf_fw_counters_add(struct adf_accel_dev *accel_dev);
+void adf_fw_counters_remove(struct adf_accel_dev *accel_dev);
+int adf_fw_count_ras_event(struct adf_accel_dev *accel_dev,
+ u32 *ras_event,
+ char *aeidstr);
+
+#endif /* ADF_FW_COUNTERS_H_ */
diff --git a/sys/dev/qat/include/adf_heartbeat.h b/sys/dev/qat/include/adf_heartbeat.h
new file mode 100644
index 000000000000..55ca58152017
--- /dev/null
+++ b/sys/dev/qat/include/adf_heartbeat.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2022 Intel Corporation */
+/* $FreeBSD$ */
+#ifndef ADF_HEARTBEAT_H_
+#define ADF_HEARTBEAT_H_
+
+#include "adf_cfg_common.h"
+
+struct adf_accel_dev;
+
+struct qat_sysctl {
+ unsigned int hb_sysctlvar;
+ struct sysctl_oid *oid;
+};
+
+struct adf_heartbeat {
+ unsigned int hb_sent_counter;
+ unsigned int hb_failed_counter;
+ u64 last_hb_check_time;
+ enum adf_device_heartbeat_status last_hb_status;
+ struct qat_sysctl heartbeat;
+ struct qat_sysctl *heartbeat_sent;
+ struct qat_sysctl *heartbeat_failed;
+};
+
+int adf_heartbeat_init(struct adf_accel_dev *accel_dev);
+void adf_heartbeat_clean(struct adf_accel_dev *accel_dev);
+
+int adf_get_hb_timer(struct adf_accel_dev *accel_dev, unsigned int *value);
+int adf_get_heartbeat_status(struct adf_accel_dev *accel_dev);
+int adf_heartbeat_status(struct adf_accel_dev *accel_dev,
+ enum adf_device_heartbeat_status *hb_status);
+#endif /* ADF_HEARTBEAT_H_ */
diff --git a/sys/dev/qat/include/adf_heartbeat_dbg.h b/sys/dev/qat/include/adf_heartbeat_dbg.h
new file mode 100644
index 000000000000..2d63e62398c2
--- /dev/null
+++ b/sys/dev/qat/include/adf_heartbeat_dbg.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2022 Intel Corporation */
+/* $FreeBSD$ */
+#ifndef ADF_HEARTBEAT_DBG_H_
+#define ADF_HEARTBEAT_DBG_H_
+
+struct adf_accel_dev;
+int adf_heartbeat_dbg_add(struct adf_accel_dev *accel_dev);
+int adf_heartbeat_dbg_del(struct adf_accel_dev *accel_dev);
+
+#endif /* ADF_HEARTBEAT_DBG_H_ */
diff --git a/sys/dev/qat/include/adf_pf2vf_msg.h b/sys/dev/qat/include/adf_pf2vf_msg.h
new file mode 100644
index 000000000000..9c8462a8f6b6
--- /dev/null
+++ b/sys/dev/qat/include/adf_pf2vf_msg.h
@@ -0,0 +1,182 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2022 Intel Corporation */
+/* $FreeBSD$ */
+#ifndef ADF_PF2VF_MSG_H
+#define ADF_PF2VF_MSG_H
+
+/*
+ * PF<->VF Messaging
+ * The PF has an array of 32-bit PF2VF registers, one for each VF. The
+ * PF can access all these registers; each VF can access only the one
+ * register associated with that particular VF.
+ *
+ * The register functionally is split into two parts:
+ * The bottom half is for PF->VF messages. In particular when the first
+ * bit of this register (bit 0) gets set an interrupt will be triggered
+ * in the respective VF.
+ * The top half is for VF->PF messages. In particular when the first bit
+ * of this half of register (bit 16) gets set an interrupt will be triggered
+ * in the PF.
+ *
+ * The remaining bits within this register are available to encode messages.
+ * and implement a collision control mechanism to prevent concurrent use of
+ * the PF2VF register by both the PF and VF.
+ *
+ * 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
+ * _______________________________________________
+ * | | | | | | | | | | | | | | | | |
+ * +-----------------------------------------------+
+ * \___________________________/ \_________/ ^ ^
+ * ^ ^ | |
+ * | | | VF2PF Int
+ * | | Message Origin
+ * | Message Type
+ * Message-specific Data/Reserved
+ *
+ * 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+ * _______________________________________________
+ * | | | | | | | | | | | | | | | | |
+ * +-----------------------------------------------+
+ * \___________________________/ \_________/ ^ ^
+ * ^ ^ | |
+ * | | | PF2VF Int
+ * | | Message Origin
+ * | Message Type
+ * Message-specific Data/Reserved
+ *
+ * Message Origin (Should always be 1)
+ * A legacy out-of-tree QAT driver allowed for a set of messages not supported
+ * by this driver; these had a Msg Origin of 0 and are ignored by this driver.
+ *
+ * When a PF or VF attempts to send a message in the lower or upper 16 bits,
+ * respectively, the other 16 bits are written to first with a defined
+ * IN_USE_BY pattern as part of a collision control scheme (see adf_iov_putmsg).
+ */
+
+/* VF/PF compatibility version. */
+/* ADF_PFVF_COMPATIBILITY_EXT_CAP: Support for extended capabilities */
+#define ADF_PFVF_COMPATIBILITY_CAPABILITIES 2
+/* ADF_PFVF_COMPATIBILITY_FAST_ACK: In-use pattern cleared by receiver */
+#define ADF_PFVF_COMPATIBILITY_FAST_ACK 3
+#define ADF_PFVF_COMPATIBILITY_RING_TO_SVC_MAP 4
+#define ADF_PFVF_COMPATIBILITY_VERSION 4 /* PF<->VF compat */
+
+/* PF->VF messages */
+#define ADF_PF2VF_INT BIT(0)
+#define ADF_PF2VF_MSGORIGIN_SYSTEM BIT(1)
+#define ADF_PF2VF_MSGTYPE_MASK 0x0000003C
+#define ADF_PF2VF_MSGTYPE_SHIFT 2
+#define ADF_PF2VF_MSGTYPE_RESTARTING 0x01
+#define ADF_PF2VF_MSGTYPE_VERSION_RESP 0x02
+#define ADF_PF2VF_MSGTYPE_BLOCK_RESP 0x03
+#define ADF_PF2VF_MSGTYPE_FATAL_ERROR 0x04
+#define ADF_PF2VF_IN_USE_BY_PF 0x6AC20000
+#define ADF_PF2VF_IN_USE_BY_PF_MASK 0xFFFE0000
+
+/* PF->VF Version Response */
+#define ADF_PF2VF_VERSION_RESP_VERS_MASK 0x00003FC0
+#define ADF_PF2VF_VERSION_RESP_VERS_SHIFT 6
+#define ADF_PF2VF_VERSION_RESP_RESULT_MASK 0x0000C000
+#define ADF_PF2VF_VERSION_RESP_RESULT_SHIFT 14
+#define ADF_PF2VF_MINORVERSION_SHIFT 6
+#define ADF_PF2VF_MAJORVERSION_SHIFT 10
+#define ADF_PF2VF_VF_COMPATIBLE 1
+#define ADF_PF2VF_VF_INCOMPATIBLE 2
+#define ADF_PF2VF_VF_COMPAT_UNKNOWN 3
+
+/* PF->VF Block Request Type */
+#define ADF_VF2PF_MIN_SMALL_MESSAGE_TYPE 0
+#define ADF_VF2PF_MAX_SMALL_MESSAGE_TYPE (ADF_VF2PF_MIN_SMALL_MESSAGE_TYPE + 15)
+#define ADF_VF2PF_MIN_MEDIUM_MESSAGE_TYPE (ADF_VF2PF_MAX_SMALL_MESSAGE_TYPE + 1)
+#define ADF_VF2PF_MAX_MEDIUM_MESSAGE_TYPE \
+ (ADF_VF2PF_MIN_MEDIUM_MESSAGE_TYPE + 7)
+#define ADF_VF2PF_MIN_LARGE_MESSAGE_TYPE (ADF_VF2PF_MAX_MEDIUM_MESSAGE_TYPE + 1)
+#define ADF_VF2PF_MAX_LARGE_MESSAGE_TYPE (ADF_VF2PF_MIN_LARGE_MESSAGE_TYPE + 3)
+#define ADF_VF2PF_SMALL_PAYLOAD_SIZE 30
+#define ADF_VF2PF_MEDIUM_PAYLOAD_SIZE 62
+#define ADF_VF2PF_LARGE_PAYLOAD_SIZE 126
+
+#define ADF_VF2PF_MAX_BLOCK_TYPE 3
+#define ADF_VF2PF_BLOCK_REQ_TYPE_SHIFT 22
+#define ADF_VF2PF_LARGE_BLOCK_BYTE_NUM_SHIFT 24
+#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_NUM_SHIFT 25
+#define ADF_VF2PF_SMALL_BLOCK_BYTE_NUM_SHIFT 26
+#define ADF_VF2PF_BLOCK_REQ_CRC_SHIFT 31
+#define ADF_VF2PF_LARGE_BLOCK_BYTE_NUM_MASK 0x7F000000
+#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_NUM_MASK 0x7E000000
+#define ADF_VF2PF_SMALL_BLOCK_BYTE_NUM_MASK 0x7C000000
+#define ADF_VF2PF_LARGE_BLOCK_REQ_TYPE_MASK 0xC00000
+#define ADF_VF2PF_MEDIUM_BLOCK_REQ_TYPE_MASK 0x1C00000
+#define ADF_VF2PF_SMALL_BLOCK_REQ_TYPE_MASK 0x3C00000
+
+/* PF->VF Block Response Type */
+#define ADF_PF2VF_BLOCK_RESP_TYPE_DATA 0x0
+#define ADF_PF2VF_BLOCK_RESP_TYPE_CRC 0x1
+#define ADF_PF2VF_BLOCK_RESP_TYPE_ERROR 0x2
+#define ADF_PF2VF_BLOCK_RESP_TYPE_SHIFT 6
+#define ADF_PF2VF_BLOCK_RESP_DATA_SHIFT 8
+#define ADF_PF2VF_BLOCK_RESP_TYPE_MASK 0x000000C0
+#define ADF_PF2VF_BLOCK_RESP_DATA_MASK 0x0000FF00
+
+/* PF-VF block message header bytes */
+#define ADF_VF2PF_BLOCK_VERSION_BYTE 0
+#define ADF_VF2PF_BLOCK_LEN_BYTE 1
+#define ADF_VF2PF_BLOCK_DATA 2
+
+/* PF->VF Block Error Code */
+#define ADF_PF2VF_INVALID_BLOCK_TYPE 0x0
+#define ADF_PF2VF_INVALID_BYTE_NUM_REQ 0x1
+#define ADF_PF2VF_PAYLOAD_TRUNCATED 0x2
+#define ADF_PF2VF_UNSPECIFIED_ERROR 0x3
+
+/* VF->PF messages */
+#define ADF_VF2PF_IN_USE_BY_VF 0x00006AC2
+#define ADF_VF2PF_IN_USE_BY_VF_MASK 0x0000FFFE
+#define ADF_VF2PF_INT BIT(16)
+#define ADF_VF2PF_MSGORIGIN_SYSTEM BIT(17)
+#define ADF_VF2PF_MSGTYPE_MASK 0x003C0000
+#define ADF_VF2PF_MSGTYPE_SHIFT 18
+#define ADF_VF2PF_MSGTYPE_INIT 0x3
+#define ADF_VF2PF_MSGTYPE_SHUTDOWN 0x4
+#define ADF_VF2PF_MSGTYPE_VERSION_REQ 0x5
+#define ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ 0x6
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