git: baa2ff7ac8e2 - stable/14 - bnxt_en: Add backing store V2 support
- Go to: [ bottom of page ] [ top of archives ] [ this month ]
Date: Sun, 27 Apr 2025 22:06:10 UTC
The branch stable/14 has been updated by imp:
URL: https://cgit.FreeBSD.org/src/commit/?id=baa2ff7ac8e2e3d3f30c6f854b6ea6728b3e635e
commit baa2ff7ac8e2e3d3f30c6f854b6ea6728b3e635e
Author: Sreekanth Reddy <sreekanth.reddy@broadcom.com>
AuthorDate: 2025-04-02 11:38:59 +0000
Commit: Warner Losh <imp@FreeBSD.org>
CommitDate: 2025-04-27 22:02:58 +0000
bnxt_en: Add backing store V2 support
Add backing store V2 support.
Thor2 controllers supports only the V2 support.
MFC-After: 3 days
Reviewed-by: Warner Losh <imp@FreeBSD.org>
Differential-Revision: https://reviews.freebsd.org/D49727
(cherry picked from commit d5ce906da7c55085f93fce096ebb8bc44a3cffe5)
---
sys/dev/bnxt/bnxt_en/bnxt.h | 14 ++++--
sys/dev/bnxt/bnxt_en/bnxt_hwrm.c | 92 ++++++++++++++++++++++++++++++++++------
sys/dev/bnxt/bnxt_en/if_bnxt.c | 65 ++++++++++++++++++++++++++--
3 files changed, 153 insertions(+), 18 deletions(-)
diff --git a/sys/dev/bnxt/bnxt_en/bnxt.h b/sys/dev/bnxt/bnxt_en/bnxt.h
index 20d0fd2c81c0..1b928fa9c2fe 100644
--- a/sys/dev/bnxt/bnxt_en/bnxt.h
+++ b/sys/dev/bnxt/bnxt_en/bnxt.h
@@ -727,11 +727,11 @@ struct bnxt_ctx_pg_info {
#define BNXT_SET_CTX_PAGE_ATTR(attr) \
do { \
if (BNXT_PAGE_SIZE == 0x2000) \
- attr = HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_SRQ_PG_SIZE_PG_8K; \
+ attr = HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_8K; \
else if (BNXT_PAGE_SIZE == 0x10000) \
- attr = HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_QPC_PG_SIZE_PG_64K; \
+ attr = HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_64K; \
else \
- attr = HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_QPC_PG_SIZE_PG_4K; \
+ attr = HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_4K; \
} while (0)
struct bnxt_ctx_mem_type {
@@ -746,6 +746,8 @@ struct bnxt_ctx_mem_type {
#define BNXT_CTX_INIT_INVALID_OFFSET 0xffff
u32 max_entries;
u32 min_entries;
+ u8 last:1;
+ u8 mem_valid:1;
u8 split_entry_cnt;
#define BNXT_MAX_SPLIT_ENTRY 4
union {
@@ -781,9 +783,15 @@ struct bnxt_ctx_mem_type {
#define BNXT_CTX_RQDBS HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_RQ_DB_SHADOW
#define BNXT_CTX_SRQDBS HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_SRQ_DB_SHADOW
#define BNXT_CTX_CQDBS HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_CQ_DB_SHADOW
+#define BNXT_CTX_QTKC HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_QUIC_TKC
+#define BNXT_CTX_QRKC HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_QUIC_RKC
#define BNXT_CTX_MAX (BNXT_CTX_TIM + 1)
+#define BNXT_CTX_L2_MAX (BNXT_CTX_FTQM + 1)
#define BNXT_CTX_V2_MAX (HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_ROCE_HWRM_TRACE + 1)
+#define BNXT_CTX_SRT_TRACE HWRM_FUNC_BACKING_STORE_QCFG_V2_OUTPUT_TYPE_SRT_TRACE
+#define BNXT_CTX_ROCE_HWRM_TRACE HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_ROCE_HWRM_TRACE
+#define BNXT_CTX_INV ((u16)-1)
struct bnxt_ctx_mem_info {
u8 tqm_fp_rings_count;
diff --git a/sys/dev/bnxt/bnxt_en/bnxt_hwrm.c b/sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
index b8336eda229e..214866b766db 100644
--- a/sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
+++ b/sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
@@ -350,12 +350,12 @@ qportcfg_exit:
return rc;
}
-static int bnxt_alloc_all_ctx_pg_info(struct bnxt_softc *softc)
+static int bnxt_alloc_all_ctx_pg_info(struct bnxt_softc *softc, int ctx_max)
{
struct bnxt_ctx_mem_info *ctx = softc->ctx_mem;
u16 type;
- for (type = 0; type < BNXT_CTX_MAX; type++) {
+ for (type = 0; type < ctx_max; type++) {
struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type];
int n = 1;
@@ -364,7 +364,7 @@ static int bnxt_alloc_all_ctx_pg_info(struct bnxt_softc *softc)
if (ctxm->instance_bmap)
n = hweight32(ctxm->instance_bmap);
- ctxm->pg_info = kcalloc(n, sizeof(*ctxm->pg_info), GFP_KERNEL);
+ ctxm->pg_info = kcalloc(n, sizeof(*ctxm->pg_info), GFP_ATOMIC);
if (!ctxm->pg_info)
return -ENOMEM;
}
@@ -383,6 +383,69 @@ static void bnxt_init_ctx_initializer(struct bnxt_ctx_mem_type *ctxm,
ctxm->init_value = 0;
}
+#define BNXT_CTX_INIT_VALID(flags) \
+ (!!((flags) & \
+ HWRM_FUNC_BACKING_STORE_QCAPS_V2_OUTPUT_FLAGS_ENABLE_CTX_KIND_INIT))
+
+static int
+bnxt_hwrm_func_backing_store_qcaps_v2(struct bnxt_softc *softc)
+{
+ struct hwrm_func_backing_store_qcaps_v2_input req = {0};
+ struct hwrm_func_backing_store_qcaps_v2_output *resp =
+ (void *)softc->hwrm_cmd_resp.idi_vaddr;
+ struct bnxt_ctx_mem_info *ctx = NULL;
+ u16 type;
+ int rc;
+
+ bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_BACKING_STORE_QCAPS_V2);
+
+ ctx = malloc(sizeof(*ctx), M_DEVBUF, M_NOWAIT | M_ZERO);
+ if (!ctx)
+ return -ENOMEM;
+
+ softc->ctx_mem = ctx;
+
+ BNXT_HWRM_LOCK(softc);
+ for (type = 0; type < BNXT_CTX_V2_MAX; ) {
+ struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type];
+ u8 init_val, init_off, i;
+ __le32 *p;
+ u32 flags;
+
+ req.type = cpu_to_le16(type);
+ rc = _hwrm_send_message(softc, &req, sizeof(req));
+ if (rc)
+ goto ctx_done;
+ flags = le32_to_cpu(resp->flags);
+ type = le16_to_cpu(resp->next_valid_type);
+ if (!(flags & HWRM_FUNC_BACKING_STORE_QCAPS_V2_OUTPUT_FLAGS_TYPE_VALID))
+ continue;
+
+ ctxm->type = le16_to_cpu(resp->type);
+ ctxm->flags = flags;
+
+ ctxm->entry_size = le16_to_cpu(resp->entry_size);
+ ctxm->instance_bmap = le32_to_cpu(resp->instance_bit_map);
+ ctxm->entry_multiple = resp->entry_multiple;
+ ctxm->max_entries = le32_to_cpu(resp->max_num_entries);
+ ctxm->min_entries = le32_to_cpu(resp->min_num_entries);
+ init_val = resp->ctx_init_value;
+ init_off = resp->ctx_init_offset;
+ bnxt_init_ctx_initializer(ctxm, init_val, init_off,
+ BNXT_CTX_INIT_VALID(flags));
+ ctxm->split_entry_cnt = min_t(u8, resp->subtype_valid_cnt,
+ BNXT_MAX_SPLIT_ENTRY);
+ for (i = 0, p = &resp->split_entry_0; i < ctxm->split_entry_cnt;
+ i++, p++)
+ ctxm->split[i] = le32_to_cpu(*p);
+ }
+ rc = bnxt_alloc_all_ctx_pg_info(softc, BNXT_CTX_V2_MAX);
+
+ctx_done:
+ BNXT_HWRM_UNLOCK(softc);
+ return rc;
+}
+
int bnxt_hwrm_func_backing_store_qcaps(struct bnxt_softc *softc)
{
struct hwrm_func_backing_store_qcaps_input req = {0};
@@ -393,6 +456,11 @@ int bnxt_hwrm_func_backing_store_qcaps(struct bnxt_softc *softc)
if (softc->hwrm_spec_code < 0x10902 || softc->ctx_mem)
return 0;
+ if (BNXT_CHIP_P7(softc)) {
+ if (softc->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2)
+ return bnxt_hwrm_func_backing_store_qcaps_v2(softc);
+ }
+
if (BNXT_VF(softc))
return 0;
@@ -493,7 +561,7 @@ int bnxt_hwrm_func_backing_store_qcaps(struct bnxt_softc *softc)
memcpy(ctxm, &ctx->ctx_arr[BNXT_CTX_STQM], sizeof(*ctxm));
ctxm->instance_bmap = (1 << ctx->tqm_fp_rings_count) - 1;
- rc = bnxt_alloc_all_ctx_pg_info(softc);
+ rc = bnxt_alloc_all_ctx_pg_info(softc, BNXT_CTX_MAX);
} else {
rc = 0;
}
@@ -512,14 +580,11 @@ ctx_err:
static void bnxt_hwrm_set_pg_attr(struct bnxt_ring_mem_info *rmem, uint8_t *pg_attr,
uint64_t *pg_dir)
{
- uint8_t pg_size = 0;
+ if (!rmem->nr_pages)
+ return;
- if (BNXT_PAGE_SHIFT == 13)
- pg_size = 1 << 4;
- else if (BNXT_PAGE_SIZE == 16)
- pg_size = 2 << 4;
+ BNXT_SET_CTX_PAGE_ATTR(*pg_attr);
- *pg_attr = pg_size;
if (rmem->depth >= 1) {
if (rmem->depth == 2)
*pg_attr |= HWRM_FUNC_BACKING_STORE_CFG_INPUT_QPC_LVL_LVL_2;
@@ -720,8 +785,10 @@ int bnxt_hwrm_func_backing_store_cfg_v2(struct bnxt_softc *softc,
bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_BACKING_STORE_CFG_V2);
+ BNXT_HWRM_LOCK(softc);
req.type = cpu_to_le16(ctxm->type);
req.entry_size = cpu_to_le16(ctxm->entry_size);
+ req.subtype_valid_cnt = ctxm->split_entry_cnt;
for (i = 0, p = &req.split_entry_0; i < ctxm->split_entry_cnt; i++)
p[i] = cpu_to_le32(ctxm->split[i]);
for (i = 0, j = 0; j < n && !rc; i++) {
@@ -737,11 +804,12 @@ int bnxt_hwrm_func_backing_store_cfg_v2(struct bnxt_softc *softc,
bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,
&req.page_size_pbl_level,
&req.page_dir);
- if (last && j == (n - 1))
+ if (last && j == n)
req.flags =
cpu_to_le32(HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_FLAGS_BS_CFG_ALL_DONE);
- rc = hwrm_send_message(softc, &req, sizeof(req));
+ rc = _hwrm_send_message(softc, &req, sizeof(req));
}
+ BNXT_HWRM_UNLOCK(softc);
return rc;
}
diff --git a/sys/dev/bnxt/bnxt_en/if_bnxt.c b/sys/dev/bnxt/bnxt_en/if_bnxt.c
index fe718c14b24f..15081c3ee09e 100644
--- a/sys/dev/bnxt/bnxt_en/if_bnxt.c
+++ b/sys/dev/bnxt/bnxt_en/if_bnxt.c
@@ -1054,6 +1054,8 @@ static int bnxt_setup_ctxm_pg_tbls(struct bnxt_softc *softc,
rc = bnxt_alloc_ctx_pg_tbls(softc, &ctx_pg[i], mem_size, pg_lvl,
ctxm->init_value ? ctxm : NULL);
}
+ if (!rc)
+ ctxm->mem_valid = 1;
return rc;
}
@@ -1086,6 +1088,54 @@ static void bnxt_free_ctx_mem(struct bnxt_softc *softc)
softc->ctx_mem = NULL;
}
+static int
+bnxt_backing_store_cfg_v2(struct bnxt_softc *softc, u32 ena)
+{
+ struct bnxt_ctx_mem_info *ctx = softc->ctx_mem;
+ struct bnxt_ctx_mem_type *ctxm;
+ u16 last_type = BNXT_CTX_INV;
+ int rc = 0;
+ u16 type;
+
+ if (BNXT_PF(softc)) {
+ for (type = BNXT_CTX_SRT_TRACE; type <= BNXT_CTX_ROCE_HWRM_TRACE; type++) {
+ ctxm = &ctx->ctx_arr[type];
+ if (!(ctxm->flags & BNXT_CTX_MEM_TYPE_VALID))
+ continue;
+ rc = bnxt_setup_ctxm_pg_tbls(softc, ctxm, ctxm->max_entries, 1);
+ if (rc) {
+ device_printf(softc->dev, "Unable to setup ctx page for type:0x%x.\n", type);
+ rc = 0;
+ continue;
+ }
+ /* ckp TODO: this is trace buffer related stuff, so keeping it diabled now. needs revisit */
+ //bnxt_bs_trace_init(bp, ctxm, type - BNXT_CTX_SRT_TRACE);
+ last_type = type;
+ }
+ }
+
+ if (last_type == BNXT_CTX_INV) {
+ if (!ena)
+ return 0;
+ else if (ena & HWRM_FUNC_BACKING_STORE_CFG_INPUT_ENABLES_TIM)
+ last_type = BNXT_CTX_MAX - 1;
+ else
+ last_type = BNXT_CTX_L2_MAX - 1;
+ }
+ ctx->ctx_arr[last_type].last = 1;
+
+ for (type = 0 ; type < BNXT_CTX_V2_MAX; type++) {
+ ctxm = &ctx->ctx_arr[type];
+
+ if (!ctxm->mem_valid)
+ continue;
+ rc = bnxt_hwrm_func_backing_store_cfg_v2(softc, ctxm, ctxm->last);
+ if (rc)
+ return rc;
+ }
+ return 0;
+}
+
static int bnxt_alloc_ctx_mem(struct bnxt_softc *softc)
{
struct bnxt_ctx_pg_info *ctx_pg;
@@ -1113,6 +1163,10 @@ static int bnxt_alloc_ctx_mem(struct bnxt_softc *softc)
if (!ctx || (ctx->flags & BNXT_CTX_FLAG_INITED))
return 0;
+ ena = 0;
+ if (BNXT_VF(softc))
+ goto skip_legacy;
+
ctxm = &ctx->ctx_arr[BNXT_CTX_QP];
l2_qps = ctxm->qp_l2_entries;
qp1_qps = ctxm->qp_qp1_entries;
@@ -1153,7 +1207,6 @@ static int bnxt_alloc_ctx_mem(struct bnxt_softc *softc)
if (rc)
return rc;
- ena = 0;
if (!(softc->flags & BNXT_FLAG_ROCE_CAP))
goto skip_rdma;
@@ -1202,10 +1255,16 @@ skip_rdma:
}
ena |= HWRM_FUNC_BACKING_STORE_CFG_INPUT_DFLT_ENABLES;
- rc = bnxt_hwrm_func_backing_store_cfg(softc, ena);
+skip_legacy:
+ if (BNXT_CHIP_P7(softc)) {
+ if (softc->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2)
+ rc = bnxt_backing_store_cfg_v2(softc, ena);
+ } else {
+ rc = bnxt_hwrm_func_backing_store_cfg(softc, ena);
+ }
if (rc) {
device_printf(softc->dev, "Failed configuring context mem, rc = %d.\n",
- rc);
+ rc);
return rc;
}
ctx->flags |= BNXT_CTX_FLAG_INITED;