From nobody Mon Jul 04 18:09:27 2022 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id E8F561C3F3D6; Mon, 4 Jul 2022 18:09:28 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4LcDN75W82z4kPf; Mon, 4 Jul 2022 18:09:27 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1656958168; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=igPIf+s+Q2e1b8IkO07DuALcDDQmB1pbTE0N/bElkh0=; b=QOyWKcad14NT+4UuRhr6I0o5YBLNMW+b5clF4IZtWmZ+8K2aOoiXqOBU61xdnDX9k9Nndx ZfjWD600eDXXVIn4uLg55oqJ7QG8+DGEajJb1coBX6SKdkMl4SJdTfiqN2mKFHCArHSEZ2 1MPBX37f0De7Vo5icYKaudlgbk/RKCIkq148MjJIOlByyzoKVp+CTct5Zvi+euK1/8cHKj VX3yzL8awjA/sJTP++GsMT+JEjSF+rRgzmmJ/vQ/dINt0e+QHwzNp+8xs7tW0Pu1TCoM/5 5zjyfLM+kHCvaW5UfdHTr8ncPGcdwTVK45Nbexb84u1YdYcLmEueyZ3U8DI2AA== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 7AF15161A0; Mon, 4 Jul 2022 18:09:27 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 264I9R8h064505; Mon, 4 Jul 2022 18:09:27 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 264I9R2s064504; Mon, 4 Jul 2022 18:09:27 GMT (envelope-from git) Date: Mon, 4 Jul 2022 18:09:27 GMT Message-Id: <202207041809.264I9R2s064504@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Alexander Motin Subject: git: 6b1e6a629db9 - stable/13 - hwpmc: Bump Intel's IA32_PERFEVTSELx width to 64 bits. List-Id: Commits to the stable branches of the FreeBSD src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-branches@freebsd.org X-BeenThere: dev-commits-src-branches@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mav X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 6b1e6a629db9bb28f2649849da7997800f12e0e6 Auto-Submitted: auto-generated ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1656958168; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=igPIf+s+Q2e1b8IkO07DuALcDDQmB1pbTE0N/bElkh0=; b=Ub4fzd3aMubpy4f4kO2UBdvVyA/Hmo/6KvDKtjUgZb2Q5phSuyaUksOACRPdRXE77GJBWs 0M84mh1sX7VfHoPhx1lHAjGJlX78+omRqINlzEDqYH6Cy3VDgFMc0R10MMdUlIJgIP6e9U QqyZJ5ctd6ZYOysF7tBeo1g8Y4Zi2FmCkCwDDe3UM9Ri49wB060aMdLvXGzWmsEa0TbH09 +v9mfcCcYPO2WuUR9l8grUpXHiWRSqGtg9OsllJEKDTzpAIxuvzm5WFpra2wjvgOYPDtH8 aEknDCkr3CwZlT06cE3sVONXFHs8mpPEYzL4ygOuiW5sWJ9Upp8Wpd+5F0q1vQ== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1656958168; a=rsa-sha256; cv=none; b=gG9pr2tBZNCepp2DDhBnv1oke2iCViJ47DKEnLAav3UeOtpoVGpXKwPReVD/2vaggCUV1M MOpMKRToRj8MNMhyGVjMhaLFM0rtb5EjJx9uZ8EtqDvvGdpgqg+PKnQWktrKRCLA9jryHt p7rUkbg/j0IJHPhCFuoMQOXoZ7QqIusFRmJDmcu9wl5u2FCwgriC0GsjceI8UaSILyXhfR KSFA+eATYn95dvilGO/9Xekf0Srt9cKlZ4xM3GEZchoHtpB0+UF5EwmW9UFuC/fKWZN0FO Ifkfy9vODBz2RjUpMJ5scqL7A8LhX4ucQXKyLaHCibfPC6Yx8P5uwWKBz4pvHA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none X-ThisMailContainsUnwantedMimeParts: N The branch stable/13 has been updated by mav: URL: https://cgit.FreeBSD.org/src/commit/?id=6b1e6a629db9bb28f2649849da7997800f12e0e6 commit 6b1e6a629db9bb28f2649849da7997800f12e0e6 Author: Alexander Motin AuthorDate: 2022-06-02 17:08:55 +0000 Commit: Alexander Motin CommitDate: 2022-07-04 17:48:10 +0000 hwpmc: Bump Intel's IA32_PERFEVTSELx width to 64 bits. Haswell added there bits 32/33 for TSX, and AlderLake added bit 34 for Adaptive PEBS Record. MFC after: 1 month (cherry picked from commit 1a4614a51ee7e3d3cd4ef30b16e13f9ef1713a56) --- sys/dev/hwpmc/hwpmc_core.c | 5 +++-- sys/dev/hwpmc/hwpmc_core.h | 40 ++++++++++++++++++++++------------------ sys/dev/hwpmc/hwpmc_uncore.c | 2 +- sys/dev/hwpmc/hwpmc_uncore.h | 4 ++-- 4 files changed, 28 insertions(+), 23 deletions(-) diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c index 41896ffb7b8e..56efc72aed80 100644 --- a/sys/dev/hwpmc/hwpmc_core.c +++ b/sys/dev/hwpmc/hwpmc_core.c @@ -226,7 +226,8 @@ iaf_allocate_pmc(int cpu, int ri, struct pmc *pm, const struct pmc_op_pmcallocate *a) { uint8_t ev, umask; - uint32_t caps, flags, config; + uint32_t caps; + uint64_t config, flags; const struct pmc_md_iap_op_pmcallocate *iap; KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), @@ -911,7 +912,7 @@ static int iap_start_pmc(int cpu, int ri) { struct pmc *pm; - uint32_t evsel; + uint64_t evsel; struct core_cpu *cc; KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), diff --git a/sys/dev/hwpmc/hwpmc_core.h b/sys/dev/hwpmc/hwpmc_core.h index 5b42182a876c..b75146d8b590 100644 --- a/sys/dev/hwpmc/hwpmc_core.h +++ b/sys/dev/hwpmc/hwpmc_core.h @@ -48,7 +48,7 @@ * Programmable PMCs. */ struct pmc_md_iap_op_pmcallocate { - uint32_t pm_iap_config; + uint64_t pm_iap_config; uint64_t pm_iap_rsp; }; @@ -75,9 +75,8 @@ struct pmc_md_iap_op_pmcallocate { * Fixed-function counters. */ -#define IAF_MASK 0xF +#define IAF_MASK 0x000000010000000f -#define IAF_COUNTER_MASK 0x0000ffffffffffff #define IAF_CTR0 0x309 #define IAF_CTR1 0x30A #define IAF_CTR2 0x30B @@ -86,7 +85,17 @@ struct pmc_md_iap_op_pmcallocate { * The IAF_CTRL MSR is laid out in the following way. * * Bit Position Use - * 63 - 12 Reserved (do not touch) + * 63 - 45 Reserved (do not touch) + * 44 Ctr 3 Adaptive Record (v5) + * 43 - 41 Reserved (do not touch) + * 40 Ctr 2 Adaptive Record (v5) + * 39 - 37 Reserved (do not touch) + * 36 Ctr 1 Adaptive Record (v5) + * 35 - 33 Reserved (do not touch) + * 32 Ctr 0 Adaptive Record (v5) + * 15 Ctr 3 PMI + * 14 Ctr 3 Any Thread (v3) + * 13-12 Ctr 3 Enable * 11 Ctr 2 PMI * 10 Ctr 2 Any Thread (v3) * 9-8 Ctr 2 Enable @@ -100,7 +109,6 @@ struct pmc_md_iap_op_pmcallocate { #define IAF_OFFSET 32 #define IAF_CTRL 0x38D -#define IAF_CTRL_MASK 0x0000000000000fff /* * Programmable counters. @@ -113,7 +121,10 @@ struct pmc_md_iap_op_pmcallocate { * IAP_EVSEL(n) is laid out in the following way. * * Bit Position Use - * 63-31 Reserved (do not touch) + * 63-35 Reserved (do not touch) + * 34 Adaptive Record (v5) + * 33 IN_TX (v3) + * 32 IN_TXCP (v3) * 31-24 Counter Mask * 23 Invert * 22 Enable @@ -127,7 +138,6 @@ struct pmc_md_iap_op_pmcallocate { * 7-0 Event Select */ -#define IAP_EVSEL_MASK 0x00000000ffffffff #define IAP_EVSEL0 0x186 /* @@ -142,22 +152,16 @@ struct pmc_md_iap_op_pmcallocate { * IA_GLOBAL_CTRL is laid out in the following way. * * Bit Position Use - * 63-35 Reserved (do not touch) + * 63-49 Reserved (do not touch) + * 48 Perf Metrics Enable (v5) + * 47-36 Reserved (do not touch) + * 35 IAF Counter 3 Enable * 34 IAF Counter 2 Enable * 33 IAF Counter 1 Enable * 32 IAF Counter 0 Enable * 31-0 Depends on programmable counters */ -/* The mask is only for the fixed porttion of the register. */ -#define IAF_GLOBAL_CTRL_MASK 0x0000000700000000 - -/* The mask is only for the programmable porttion of the register. */ -#define IAP_GLOBAL_CTRL_MASK 0x00000000ffffffff - -/* The mask is for both the fixed and programmable porttions of the register. */ -#define IA_GLOBAL_CTRL_MASK 0x00000007ffffffff - #define IA_GLOBAL_OVF_CTRL 0x390 #define IA_GLOBAL_STATUS_RESET 0x390 #define IA_GLOBAL_STATUS_SET 0x391 /* v4 */ @@ -183,7 +187,7 @@ struct pmc_md_iaf_pmc { }; struct pmc_md_iap_pmc { - uint32_t pm_iap_evsel; + uint64_t pm_iap_evsel; uint64_t pm_iap_rsp; }; diff --git a/sys/dev/hwpmc/hwpmc_uncore.c b/sys/dev/hwpmc/hwpmc_uncore.c index d0b310d740bc..1a1d3c744351 100644 --- a/sys/dev/hwpmc/hwpmc_uncore.c +++ b/sys/dev/hwpmc/hwpmc_uncore.c @@ -655,7 +655,7 @@ static int ucp_start_pmc(int cpu, int ri) { struct pmc *pm; - uint32_t evsel; + uint64_t evsel; struct uncore_cpu *cc; KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), diff --git a/sys/dev/hwpmc/hwpmc_uncore.h b/sys/dev/hwpmc/hwpmc_uncore.h index ac1623e7737e..5e8610f77ddf 100644 --- a/sys/dev/hwpmc/hwpmc_uncore.h +++ b/sys/dev/hwpmc/hwpmc_uncore.h @@ -45,7 +45,7 @@ struct pmc_md_ucf_op_pmcallocate { * Programmable PMCs. */ struct pmc_md_ucp_op_pmcallocate { - uint32_t pm_ucp_config; + uint64_t pm_ucp_config; }; #define UCP_EVSEL(C) ((C) & 0xFF) @@ -106,7 +106,7 @@ struct pmc_md_ucf_pmc { }; struct pmc_md_ucp_pmc { - uint32_t pm_ucp_evsel; + uint64_t pm_ucp_evsel; }; /*