From nobody Sun Sep 22 13:19:22 2024 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4XBRY720pgz5X9WM; Sun, 22 Sep 2024 13:19:23 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R11" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4XBRY70XPcz4Hnw; Sun, 22 Sep 2024 13:19:23 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1727011163; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=RVugKQ3eWgtSCghry1k3UwQL6sgSC4cdQV6Nm2/citI=; b=MSEPQUFTWQhpUAggFzACt3ZwU1qKhoOgRWAffNUNX3XDBJc3TLjsQ0PcsRRRqnf9azNdw7 WuTzeLS+XpNxZtyA065Z3G++VQD71/7z+Haunm7j2iqS2x8hbYYsaWZrxDsC415Uvmo2Kf lV0v5p8Emw3CtoH0YKHCQ3f+OWlHfilsW05K9qFnjTgUmtzhaKx132atrmmw/dB1adTFZO MUhyKO/RLSfKBAU9wGH/P5FtIbWk+fy+lKPxqyxFrZ7uhjmOM+TfI8u84xJXhOOuQa9VCS Jz3Dvth0K1PhIM1TRDokXXIxZCb+65lY7i8KrLWhnM4lWImHb0dGgr/R8zvCnw== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1727011163; a=rsa-sha256; cv=none; b=ZhMC04zJqaJ6qw+12dvIBAkchMrr/PKI5sIsiPju9/GqootTy+9h3PIJO6QOoGcoc2NGZ1 r7NBIjL2afNjnOX87Ymbfuw8fTNyem3zh4larFsZJ7ZUkfB27ecqRdXGpkC8oyaWA++Dez DJPrEPLxD9pZI0XQIYDTrz5wh1Vxu5X83bt7yUJduurDpQLMLTRPt20eNICniz1MIbYbUU t2GuZrotHgLD9WF2EAXn7L7LgBlAE0Dqlbx3SAZQIX15dgfOoCNl/enI5tN0qeeDuI0IX5 pF4OM2Txn3GtDCdyaCBMPv/3ByGdDxbQcTxn8MverJE++zWFynIvHV3vmxgB7w== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1727011163; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=RVugKQ3eWgtSCghry1k3UwQL6sgSC4cdQV6Nm2/citI=; b=Mk1TaaXheYDkqmz8HRGfPT3kAbfdikljKxmYTSpL8IsIRktz1mzLoPG1cDZZXShadP8UXY 2+n6P/YbqamgSVzAsow1dok2LSxpf8quX/nRJwLZM1JUc9aFwyKAnd9hHWHOtMKy17/LyE oWZ9p/Frg2jPZi3Nt2eG6pcpkKo+5VOoy8RORnz2GWnKbdD03DaWuMynnyy0NzM+DGlUnC RCyQrmDs7MMrfumUf+/jB3Ksu1hkNcxbvPOQTchdl6OhrwdJ4aHhRmJGSrV5s4LKMvrJB2 rUGJGLiMA92QYVWPh1cGchGGAA2ILc+iosCHCzZ2MWKLiqbTElNlJfwNhTiGfg== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4XBRY66xgCz1HLt; Sun, 22 Sep 2024 13:19:22 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 48MDJMfC076681; Sun, 22 Sep 2024 13:19:22 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 48MDJMdi076678; Sun, 22 Sep 2024 13:19:22 GMT (envelope-from git) Date: Sun, 22 Sep 2024 13:19:22 GMT Message-Id: <202409221319.48MDJMdi076678@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Warner Losh Subject: git: 1f0174c92786 - main - arm64: Add support for FIQs List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: imp X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 1f0174c92786938ee260d973f5c5172b1a4f6435 Auto-Submitted: auto-generated The branch main has been updated by imp: URL: https://cgit.FreeBSD.org/src/commit/?id=1f0174c92786938ee260d973f5c5172b1a4f6435 commit 1f0174c92786938ee260d973f5c5172b1a4f6435 Author: Ayrton Munoz AuthorDate: 2024-08-10 15:38:26 +0000 Commit: Warner Losh CommitDate: 2024-09-22 13:18:34 +0000 arm64: Add support for FIQs arm64 supports FIQs, fast interrupt requests, which are required by Apple silicon which hardwires the ARM timers to FIQs. This is needed by the upcoming Apple Interrupt Controller. Based on work by andrew@ and kevans@ in https://reviews.freebsd.org/D40161. Signed-off-by: Ayrton Munoz Co-authored-by: Kyle Evans Co-authored-by: Andrew Turner Reviewed-by: imp,mmel,mhorne Pull-Request: https://github.com/freebsd/freebsd-src/pull/1363 --- sys/arm64/arm64/exception.S | 32 ++++++++++++++++++++++++++++---- sys/arm64/include/armreg.h | 4 ++-- sys/arm64/include/intr.h | 6 ++++++ 3 files changed, 36 insertions(+), 6 deletions(-) diff --git a/sys/arm64/arm64/exception.S b/sys/arm64/arm64/exception.S index 9e33fd998502..b3f2a3931e08 100644 --- a/sys/arm64/arm64/exception.S +++ b/sys/arm64/arm64/exception.S @@ -30,6 +30,7 @@ #include #include +#include #include "assym.inc" .text @@ -170,7 +171,7 @@ .macro do_ast mrs x19, daif /* Make sure the IRQs are enabled before calling ast() */ - bic x19, x19, #PSR_I + bic x19, x19, #(PSR_I | PSR_F) 1: /* * Mask interrupts while checking the ast pending flag @@ -240,6 +241,17 @@ ENTRY(handle_el1h_irq) ERET END(handle_el1h_irq) +ENTRY(handle_el1h_fiq) + save_registers 1 + KMSAN_ENTER + mov x0, sp + mov x1, #INTR_ROOT_FIQ + bl intr_irq_handler + KMSAN_LEAVE + restore_registers 1 + ERET +END(handle_el1h_fiq) + ENTRY(handle_el1h_serror) save_registers 1 KMSAN_ENTER @@ -276,6 +288,18 @@ ENTRY(handle_el0_irq) ERET END(handle_el0_irq) +ENTRY(handle_el0_fiq) + save_registers 0 + KMSAN_ENTER + mov x0, sp + mov x1, #INTR_ROOT_FIQ + bl intr_irq_handler + do_ast + KMSAN_LEAVE + restore_registers 0 + ERET +END(handle_el0_fiq) + ENTRY(handle_el0_serror) save_registers 0 KMSAN_ENTER @@ -318,17 +342,17 @@ exception_vectors: vector el1h_sync 1 /* Synchronous EL1h */ vector el1h_irq 1 /* IRQ EL1h */ - vempty 1 /* FIQ EL1h */ + vector el1h_fiq 1 /* FIQ EL1h */ vector el1h_serror 1 /* Error EL1h */ vector el0_sync 0 /* Synchronous 64-bit EL0 */ vector el0_irq 0 /* IRQ 64-bit EL0 */ - vempty 0 /* FIQ 64-bit EL0 */ + vector el0_fiq 0 /* FIQ 64-bit EL0 */ vector el0_serror 0 /* Error 64-bit EL0 */ vector el0_sync 0 /* Synchronous 32-bit EL0 */ vector el0_irq 0 /* IRQ 32-bit EL0 */ - vempty 0 /* FIQ 32-bit EL0 */ + vector el0_fiq 0 /* FIQ 32-bit EL0 */ vector el0_serror 0 /* Error 32-bit EL0 */ GNU_PROPERTY_AARCH64_FEATURE_1_NOTE(GNU_PROPERTY_AARCH64_FEATURE_1_VAL) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 54600d63891e..2c4707679432 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -411,7 +411,7 @@ #define DAIF_I (1 << 1) #define DAIF_F (1 << 0) #define DAIF_ALL (DAIF_D | DAIF_A | DAIF_I | DAIF_F) -#define DAIF_INTR (DAIF_I) /* All exceptions that pass */ +#define DAIF_INTR (DAIF_I | DAIF_F) /* All exceptions that pass */ /* through the intr framework */ /* DBGBCR_EL1 - Debug Breakpoint Control Registers */ @@ -2401,7 +2401,7 @@ #define PSR_D 0x00000200UL #define PSR_DAIF (PSR_D | PSR_A | PSR_I | PSR_F) /* The default DAIF mask. These bits are valid in spsr_el1 and daif */ -#define PSR_DAIF_DEFAULT (PSR_F) +#define PSR_DAIF_DEFAULT (0) #define PSR_BTYPE 0x00000c00UL #define PSR_SSBS 0x00001000UL #define PSR_ALLINT 0x00002000UL diff --git a/sys/arm64/include/intr.h b/sys/arm64/include/intr.h index 3cdbc83ff109..f7aa2de0ee00 100644 --- a/sys/arm64/include/intr.h +++ b/sys/arm64/include/intr.h @@ -27,6 +27,7 @@ #ifndef _MACHINE_INTR_H_ #define _MACHINE_INTR_H_ +#ifndef LOCORE #ifdef FDT #include #endif @@ -48,4 +49,9 @@ arm_irq_memory_barrier(uintptr_t irq) #define ACPI_GPIO_XREF 3 #endif +#endif /* !LOCORE */ + +#define INTR_ROOT_FIQ 1 +#define INTR_ROOT_NUM 2 + #endif /* _MACHINE_INTR_H */