From nobody Wed Sep 11 10:42:09 2024 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4X3cZp1Mz4z5WNSg; Wed, 11 Sep 2024 10:42:10 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R11" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4X3cZp0cQYz4QRF; Wed, 11 Sep 2024 10:42:10 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1726051330; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=yjNnEmn2JPs9OY7H324Bqe7xPS/SEIvG3evY50R0yPY=; b=UQCkbXwzqftLZtzDi/ZNq6ZQEB+4KKcbxEyFPF5+fDIMGOACv1JPmDG+lom7rJGMrdqpm7 jXqBXfMaOj5J1nq0pxOcZ/XJmB26j8hKTgvqZTM49nyS8Efi3IaecFJQeuPzMsJFE+zgem IXbyyyN0my8YP3Lds4KQ+OXN6IlJ8eF/xyklXEvCvLcVHaiX2n7UMU0946gJd4zJ0TD9YU xSneBnl9O4Wavzjzh4Ta5X+PYUadQ7QgUi1JSIinVAfFZ4KRCiDNMcn1oTaWyypbV0bBbP ZypPZxelIzdNfdq1XtErcWugYHQThYLTfZIkqHw1Czxyv7BTQTivaKncveNwTg== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1726051330; a=rsa-sha256; cv=none; b=iYIeDn1IsNrvavOxU7GV/KBOfcwX1Flnq3KwlyatBfqxGnGeHtE+MPzGVPMbfAB+9xEYDE 86pqbfJvWXfEV6uj7cpf17Hr6QsLndC1qNInGTjv1Tv8MOfqaTC8N4VZHjl7qI2PeqX0rn yFbWqRw/+w4/1k/8jdvosmREHzfMCHIKnJiKnoq24MEuAxdMJmXEVSvTga9vBXfjRxwfQ4 PbqyS9KpiO5RoG5XQjw7J+lSOYvttipAUqBry5mG2SHTxTqpW5lNFpkPbZKbhJpjeWYOvQ VX0kyw1xuD/e2UM8dMWQjDluMLia8c95XtfFYvq9/795nUqnZ6/xwq2NJNWioQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1726051330; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=yjNnEmn2JPs9OY7H324Bqe7xPS/SEIvG3evY50R0yPY=; b=MfTQO6vgM4pSWstCwx+TEVM8V2yCYaDpx7ECKP2ENQbeNicNWZqP7G2fs0QMPqA2ZlY4+6 IQgl9kiVhl6NMP+izv+qacCWZstf+mhpyfR7EQMAjoul2Wf4goIhMB5KKDj1ZL2wTNBWWH /DxmabjylacooTAPLMb95pn5KlPUDMRd4k6dw6BX4dD2HkbHxdyuMqSkpzt923yEsLA4Mh WThMG27GkREGzJbaknYpuoy9NCGse4+MW4pMAfEnJjXMSPJWurscRKSR5t3zNArQhkJnbn HCuTupu3bGmaL2aAP/51974g15LFZyFFpH8ctF6bEE011738wgEkc/rS74oWkQ== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4X3cZp0D5KzSGk; Wed, 11 Sep 2024 10:42:10 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 48BAg96B007920; Wed, 11 Sep 2024 10:42:09 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 48BAg9w1007917; Wed, 11 Sep 2024 10:42:09 GMT (envelope-from git) Date: Wed, 11 Sep 2024 10:42:09 GMT Message-Id: <202409111042.48BAg9w1007917@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Andrew Turner Subject: git: 66a6e1d61380 - main - arm: Remove support for Armv6 CPU cores List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 66a6e1d61380cd265a4d7dfbc996aebce112db2c Auto-Submitted: auto-generated The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=66a6e1d61380cd265a4d7dfbc996aebce112db2c commit 66a6e1d61380cd265a4d7dfbc996aebce112db2c Author: Andrew Turner AuthorDate: 2024-07-12 11:48:25 +0000 Commit: Andrew Turner CommitDate: 2024-09-11 10:40:35 +0000 arm: Remove support for Armv6 CPU cores The ARM1176 is an Armv6 CPU. As Armv6 support has been removed we can also remove ARM1176 support. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45958 --- sys/arm/arm/cpufunc.c | 66 +---------------------------------------------- sys/arm/include/cpufunc.h | 3 --- 2 files changed, 1 insertion(+), 68 deletions(-) diff --git a/sys/arm/arm/cpufunc.c b/sys/arm/arm/cpufunc.c index 05dd521f8221..ba63f82ee597 100644 --- a/sys/arm/arm/cpufunc.c +++ b/sys/arm/arm/cpufunc.c @@ -67,9 +67,6 @@ unsigned int arm_dcache_align_mask; #ifdef CPU_MV_PJ4B static void pj4bv7_setup(void); #endif -#if defined(CPU_ARM1176) -static void arm11x6_setup(void); -#endif #if defined(CPU_CORTEXA) || defined(CPU_KRAIT) static void cortexa_setup(void); #endif @@ -91,22 +88,6 @@ struct cpu_functions pj4bv7_cpufuncs = { }; #endif /* CPU_MV_PJ4B */ -#if defined(CPU_ARM1176) -struct cpu_functions arm1176_cpufuncs = { - /* Cache operations */ - .cf_l2cache_wbinv_all = (void *)cpufunc_nullop, - .cf_l2cache_wbinv_range = (void *)cpufunc_nullop, - .cf_l2cache_inv_range = (void *)cpufunc_nullop, - .cf_l2cache_wb_range = (void *)cpufunc_nullop, - .cf_l2cache_drain_writebuf = (void *)cpufunc_nullop, - - /* Other functions */ - .cf_sleep = arm11x6_sleep, - - /* Soft functions */ - .cf_setup = arm11x6_setup -}; -#endif /*CPU_ARM1176 */ #if defined(CPU_CORTEXA) || defined(CPU_KRAIT) struct cpu_functions cortexa_cpufuncs = { @@ -210,13 +191,6 @@ set_cpufuncs(void) cputype = cp15_midr_get(); cputype &= CPU_ID_CPU_MASK; -#if defined(CPU_ARM1176) - if (cputype == CPU_ID_ARM1176JZS) { - cpufuncs = arm1176_cpufuncs; - get_cachetype_cp15(); - goto out; - } -#endif /* CPU_ARM1176 */ #if defined(CPU_CORTEXA) || defined(CPU_KRAIT) switch(cputype & CPU_ID_SCHEME_MASK) { case CPU_ID_CORTEXA5: @@ -262,9 +236,7 @@ out: */ -#if defined(CPU_ARM1176) \ - || defined(CPU_MV_PJ4B) \ - || defined(CPU_CORTEXA) || defined(CPU_KRAIT) +#if defined(CPU_MV_PJ4B) || defined(CPU_CORTEXA) || defined(CPU_KRAIT) static __inline void cpu_scc_setup_ccnt(void) { @@ -277,10 +249,6 @@ cpu_scc_setup_ccnt(void) /* Set PMUSERENR[0] to allow userland access */ cp15_pmuserenr_set(1); #endif -#if defined(CPU_ARM1176) - /* Set PMCR[2,0] to enable counters and reset CCNT */ - cp15_pmcr_set(5); -#else /* Set up the PMCCNTR register as a cyclecounter: * Set PMINTENCLR to 0xFFFFFFFF to block interrupts * Set PMCR[2,0] to enable counters and reset CCNT @@ -288,41 +256,9 @@ cpu_scc_setup_ccnt(void) cp15_pminten_clr(0xFFFFFFFF); cp15_pmcr_set(5); cp15_pmcnten_set(0x80000000); -#endif } #endif -#if defined(CPU_ARM1176) -static void -arm11x6_setup(void) -{ - uint32_t auxctrl, auxctrl_wax; - uint32_t tmp, tmp2; - uint32_t cpuid; - - cpuid = cp15_midr_get(); - - auxctrl = 0; - auxctrl_wax = ~0; - - /* - * Enable an errata workaround - */ - if ((cpuid & CPU_ID_CPU_MASK) == CPU_ID_ARM1176JZS) { /* ARM1176JZSr0 */ - auxctrl = ARM1176_AUXCTL_PHD; - auxctrl_wax = ~ARM1176_AUXCTL_PHD; - } - - tmp = cp15_actlr_get(); - tmp2 = tmp; - tmp &= auxctrl_wax; - tmp |= auxctrl; - if (tmp != tmp2) - cp15_actlr_set(tmp); - - cpu_scc_setup_ccnt(); -} -#endif /* CPU_ARM1176 */ #ifdef CPU_MV_PJ4B static void diff --git a/sys/arm/include/cpufunc.h b/sys/arm/include/cpufunc.h index 6562042dac0c..15fbabcc109d 100644 --- a/sys/arm/include/cpufunc.h +++ b/sys/arm/include/cpufunc.h @@ -97,9 +97,6 @@ void armv7_cpu_sleep (int); void pj4b_config (void); #endif -#if defined(CPU_ARM1176) -void arm11x6_sleep (int); /* no ref. for errata */ -#endif /*