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Wed, 4 Sep 2024 21:50:43 GMT (envelope-from git) Date: Wed, 4 Sep 2024 21:50:43 GMT Message-Id: <202409042150.484Lohms031644@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Konstantin Belousov Subject: git: b563be66998d - main - dmar_qi_emit(): use atomic_store_64() when available List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: kib X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: b563be66998ddd9dbc83364c8b515398d984c140 Auto-Submitted: auto-generated The branch main has been updated by kib: URL: https://cgit.FreeBSD.org/src/commit/?id=b563be66998ddd9dbc83364c8b515398d984c140 commit b563be66998ddd9dbc83364c8b515398d984c140 Author: Konstantin Belousov AuthorDate: 2024-06-06 03:21:31 +0000 Commit: Konstantin Belousov CommitDate: 2024-09-04 21:50:18 +0000 dmar_qi_emit(): use atomic_store_64() when available Sponsored by: Advanced Micro Devices (AMD) Sponsored by: The FreeBSD Foundation MFC after: 1 week --- sys/x86/iommu/intel_qi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/sys/x86/iommu/intel_qi.c b/sys/x86/iommu/intel_qi.c index b474d695552f..8b5cfe3c0205 100644 --- a/sys/x86/iommu/intel_qi.c +++ b/sys/x86/iommu/intel_qi.c @@ -139,15 +139,25 @@ dmar_qi_emit(struct dmar_unit *unit, uint64_t data1, uint64_t data2) { DMAR_ASSERT_LOCKED(unit); +#ifdef __LP64__ + atomic_store_64((uint64_t *)(unit->x86c.inv_queue + + unit->x86c.inv_queue_tail), data1); +#else *(volatile uint64_t *)(unit->x86c.inv_queue + unit->x86c.inv_queue_tail) = data1; +#endif unit->x86c.inv_queue_tail += DMAR_IQ_DESCR_SZ / 2; KASSERT(unit->x86c.inv_queue_tail <= unit->x86c.inv_queue_size, ("tail overflow 0x%x 0x%jx", unit->x86c.inv_queue_tail, (uintmax_t)unit->x86c.inv_queue_size)); unit->x86c.inv_queue_tail &= unit->x86c.inv_queue_size - 1; +#ifdef __LP64__ + atomic_store_64((uint64_t *)(unit->x86c.inv_queue + + unit->x86c.inv_queue_tail), data2); +#else *(volatile uint64_t *)(unit->x86c.inv_queue + unit->x86c.inv_queue_tail) = data2; +#endif unit->x86c.inv_queue_tail += DMAR_IQ_DESCR_SZ / 2; KASSERT(unit->x86c.inv_queue_tail <= unit->x86c.inv_queue_size, ("tail overflow 0x%x 0x%jx", unit->x86c.inv_queue_tail,