From nobody Wed Oct 30 18:21:02 2024 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4XdwRg2VjVz5bndX; Wed, 30 Oct 2024 18:21:03 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R10" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4XdwRg0dfhz4NrP; Wed, 30 Oct 2024 18:21:03 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1730312463; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=9hXmJDLR63N1Pvq2WcIQBgiH04FgUkwpzQ3BxtBjE7c=; b=tbuG90Xr12mndiWJcYNHpjQ+XqHfGm2CkOul2aePHymJXzrrZj4xsPwLiyqwAh8PX1y2BB LIEuQV6AFAiosQOobviUwi+nK8IotRu9pcUb5gGAe1UYKH5VH630TH7rOGz7d8wsTt+TDS hz8JxGbibLtnY7WaInsP0103oDMFYM6nBPNodEo0MZddpqvxlcL+ITUiPEYYfjeRZs5Jeu ZBCGqD2S1VuXC9CdOU7R9U4l/GPZqZ2q28ajvjSlMZMrfpkZ0rxtg5m0i5U1cVa53GNa9D gWoroJ2dd3d6HsB+jSmECZdZiEWlTkI352izpwTvDzxGAi1c1oF7fhmK8ZYlDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1730312463; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=9hXmJDLR63N1Pvq2WcIQBgiH04FgUkwpzQ3BxtBjE7c=; b=vtt8P1x7dhePI+qc44Wk1F3UhkHUepsIMmmZeO+fV1pQolnLtjDJyLx03GXQye66ngFO/h rI/Mx2iOlJ9q5HpL/uyyfgVk6v8IzTyYFf27e6V1LuzhR5rAXrZ4txay4McVzq3Kd0TQv9 m/c3xPPRXLaVshRK/llDc20DFtkfm96Bjlgpe0c4fhEKzlfRz2Wpih0A7Um0mGNl4AHvfJ 4P9CI7DIXEvpiYpfw0dPknwB7BejquQMGjs29gzjxOrfrA1xNd7eJg9jxwJjpZnDJ96jel kRivDd4wUl+or0/JNKBFDcxcs1tcytMFT5Stmm2INO5OfuxZxzyDUUHuKnHqew== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1730312463; a=rsa-sha256; cv=none; b=Fa5dknmy29O7AJzbcqAIl00MC7L0uxKwOVpuVxXD+mY8UmmatJWS+UJImqRTTzg5sGUxad 8gUsyQkeRWF7aq2Kgmq/aSnDD5IGCJ+u8U/3NNCohJ5ttpOs7ehmTkC+Svin2PNnbMSO+m QRRt8YtxdL9t/6NljYqbSDiQ1W4Q91EgxvHaRIG+clrkOFw1tnFKPWECawH6qdEUt9im9U u9R9WTa15dFJFgGPx6odG6cq1GzylsPqBRkWduG9fNpQn6rdh7zsWIhvVhMUEyvBKugqyM hgTpI5tI6S/X4NRcy0Eau0su2fInp9WuL31b0N1+x+PL7CgRTyhp/29yL63l6A== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4XdwRf6T1gz1Hvg; Wed, 30 Oct 2024 18:21:02 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 49UIL2Ok048953; Wed, 30 Oct 2024 18:21:02 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 49UIL2bY048950; Wed, 30 Oct 2024 18:21:02 GMT (envelope-from git) Date: Wed, 30 Oct 2024 18:21:02 GMT Message-Id: <202410301821.49UIL2bY048950@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Mitchell Horne Subject: git: 47ca5d103f22 - main - plic: handling for interrupt-cells == 2 List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mhorne X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 47ca5d103f229b090899379ce449af5e89faf627 Auto-Submitted: auto-generated The branch main has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=47ca5d103f229b090899379ce449af5e89faf627 commit 47ca5d103f229b090899379ce449af5e89faf627 Author: Mitchell Horne AuthorDate: 2024-10-30 18:17:09 +0000 Commit: Mitchell Horne CommitDate: 2024-10-30 18:18:16 +0000 plic: handling for interrupt-cells == 2 Some device trees report interrupt info in two cells: the first value is the IRQ number, the second value indicates the trigger type, such as IRQ_TYPE_LEVEL_HIGH. The device tree for the Allwinner D1(s) is one such case. Thus, extend the PLIC driver to accept this extra information when available. Apparently, some PLIC implementations using edge-triggered interrupts will require some special handling. This is not required for the D1, and therefore not implemented in this change. However, to prevent misbehaviour a check is added to reject this case and a message will be printed. Similarly, emit messages for the error paths, e.g. ncells == 3. Drivers will fail to attach all the same, but the message will aid in diagnosing the issue more quickly. Reviewed by: br MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D47135 --- sys/riscv/riscv/plic.c | 45 +++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 43 insertions(+), 2 deletions(-) diff --git a/sys/riscv/riscv/plic.c b/sys/riscv/riscv/plic.c index e28019e6f458..b7dda1d19daf 100644 --- a/sys/riscv/riscv/plic.c +++ b/sys/riscv/riscv/plic.c @@ -49,6 +49,8 @@ #include #include +#include + #include "pic_if.h" #define PLIC_MAX_IRQS 1024 @@ -82,6 +84,7 @@ static pic_bind_intr_t plic_bind_intr; struct plic_irqsrc { struct intr_irqsrc isrc; u_int irq; + u_int trigtype; }; struct plic_context { @@ -214,6 +217,7 @@ plic_map_intr(device_t dev, struct intr_map_data *data, { struct intr_map_data_fdt *daf; struct plic_softc *sc; + u_int irq, type; sc = device_get_softc(dev); @@ -221,10 +225,47 @@ plic_map_intr(device_t dev, struct intr_map_data *data, return (ENOTSUP); daf = (struct intr_map_data_fdt *)data; - if (daf->ncells != 1 || daf->cells[0] > sc->ndev) + if (daf->ncells != 1 && daf->ncells != 2) { + device_printf(dev, "invalid ncells value: %u\n", daf->ncells); + return (EINVAL); + } + + irq = daf->cells[0]; + type = daf->ncells == 2 ? daf->cells[1] : IRQ_TYPE_LEVEL_HIGH; + + if (irq > sc->ndev) { + device_printf(dev, "irq (%u) > sc->ndev (%u)", + daf->cells[0], sc->ndev); + return (EINVAL); + } + + /* + * TODO: handling of edge-triggered interrupts. + * + * From sifive,plic-1.0.0.yaml: + * + * "The PLIC supports both edge-triggered and level-triggered + * interrupts. For edge-triggered interrupts, the RISC-V PLIC spec + * allows two responses to edges seen while an interrupt handler is + * active; the PLIC may either queue them or ignore them. In the first + * case, handlers are oblivious to the trigger type, so it is not + * included in the interrupt specifier. In the second case, software + * needs to know the trigger type, so it can reorder the interrupt flow + * to avoid missing interrupts. This special handling is needed by at + * least the Renesas RZ/Five SoC (AX45MP AndesCore with a NCEPLIC100) + * and the T-HEAD C900 PLIC." + * + * For now, prevent interrupts with type IRQ_TYPE_EDGE_RISING from + * allocation. Emit a message so that when the relevant driver fails to + * attach, it will at least be clear why. + */ + if (type != IRQ_TYPE_LEVEL_HIGH) { + device_printf(dev, "edge-triggered interrupts not supported\n"); return (EINVAL); + } - *isrcp = &sc->isrcs[daf->cells[0]].isrc; + sc->isrcs[irq].trigtype = type; + *isrcp = &sc->isrcs[irq].isrc; return (0); }