git: a00d2dd06189 - stable/14 - x86 specialreg: add bit masks definitions for EFER features

From: Konstantin Belousov <kib_at_FreeBSD.org>
Date: Wed, 30 Oct 2024 03:09:08 UTC
The branch stable/14 has been updated by kib:

URL: https://cgit.FreeBSD.org/src/commit/?id=a00d2dd06189b894ef7b7175a2fe98afbc5486c2

commit a00d2dd06189b894ef7b7175a2fe98afbc5486c2
Author:     Konstantin Belousov <kib@FreeBSD.org>
AuthorDate: 2024-10-23 23:21:11 +0000
Commit:     Konstantin Belousov <kib@FreeBSD.org>
CommitDate: 2024-10-30 02:40:30 +0000

    x86 specialreg: add bit masks definitions for EFER features
    
    (cherry picked from commit 6308db659f2ad45b30bbf1d9c47abdc97d14ebb0)
---
 sys/x86/include/specialreg.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h
index 87461bdeafea..1f9069e3c1e1 100644
--- a/sys/x86/include/specialreg.h
+++ b/sys/x86/include/specialreg.h
@@ -107,6 +107,9 @@
 #define	EFER_FFXSR	0x000004000	/* Fast FXSAVE/FSRSTOR */
 #define	EFER_TCE	0x000008000	/* Translation Cache Extension */
 #define	EFER_MCOMMIT	0x000020000	/* Enable MCOMMIT (AMD) */
+#define	EFER_INTWB	0x000040000	/* Interruptible WBINVD */
+#define	EFER_UAIE	0x000100000	/* Upper Address Ignore */
+#define	EFER_AIBRSE	0x000200000	/* Automatic IBRS */
 
 /*
  * Intel Extended Features registers