From nobody Fri Oct 25 21:18:57 2024 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4XZwdF3pMDz5b9PZ; Fri, 25 Oct 2024 21:18:57 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R11" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4XZwdF3JHGz3wyr; Fri, 25 Oct 2024 21:18:57 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1729891137; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=wGJcKMdOE5LoW96n+FRWsSec8Lhg4BsFlGnBlxTGdJA=; b=YCfWm2PnW73FBeHLKgQj/ommqnAKgGtm99kD7gFyhr1G0J29ZY9yJYEfOSuw9YyZop2O16 ZcHAsWaj2pN7MlFIJtX5mWTGf4IemMT2uUVvZsl1/+5+9mU3W1b4zwiYlhASTPtyNBYA5e Y2gs7opSiJDmH7HlQmD+4eXquh1q+HpG2+7b1oI2hBYKjglh/O25IcQKzhqdNBwQtFNJwS mHu42sCrwm44gz6UuIbAIUJD7jv2nQ8IE6Eq23HZyrN7mMNBKqGtoVfAvYYUAJfxvUw8QQ 4E4XxDojaw+qNjJp218QZFH2jtiY+n+rMAmobaq88awiOkrIxZxtx6UP3wOC1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1729891137; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=wGJcKMdOE5LoW96n+FRWsSec8Lhg4BsFlGnBlxTGdJA=; b=PmcZi7sGMZjLly/FiWAKLY+y4kXK51leXZtJeypoTrIEREMD5IVU/7E+sx+1qDGgXIVWqN 59QUDJn+pMAtTxyY67OrT9y+WwQh8rErlYDnwaShHm/30oQSm2Yg4mmnpCuHMX8xIy8aWw KLAtVepKwRbDtjJhJYzV97SCSHFcahwz3sKzkv9DSxCY5FX1EoG9yqww5w9j5fBnsSLK6e QMfdZCTuW2rNfCbxVvWMF/nwHRClCThDEM6Oh/54lPu37fqmLRMrrFQ4omJRSIxIoNkWay gyiKZ7gYDBn9rtTPyiW8UsZpbqysnEaBrJO3q3XhFBFrilntb5NSaJa4e2SA6w== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1729891137; a=rsa-sha256; cv=none; b=Spo/RUFYXYFCZmmqB1pqHfBI1rBpaVfXBO0kraLVJya3OQzfSic/GsbYbYsU6o0/zgme5f udHypALK9CB2cKWMfpOIwmB5XWeYOBQhG+jzzlDnV5iB8Nazh3q6RFe7Cz2qjaRxmGvgWZ YT9rEWTlTVZY07yBy6fTXHfwmTuVVsjaqsLd47pBNZqbsN0mE6TEOonJWEgNoc+DuxvnTS SYPOn9FJ9apvYDfLSwoQ6mKWbCid6/gRrYjxb9SgY3D9pKWoKFnBiVD+KtdjDYSDZTEUWr 33IuSPj8JUhp6S4dRGtm7J52S80exuOb0f8qzABlOJQ9TePnbQBEl+sIs06+Zw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4XZwdF2v2nzj4s; Fri, 25 Oct 2024 21:18:57 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 49PLIvXN018815; Fri, 25 Oct 2024 21:18:57 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 49PLIvqU018812; Fri, 25 Oct 2024 21:18:57 GMT (envelope-from git) Date: Fri, 25 Oct 2024 21:18:57 GMT Message-Id: <202410252118.49PLIvqU018812@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Kyle Evans Subject: git: 4b01a7fa76ce - main - Revert "intrng: change multi-interrupt root support type to enum" List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: kevans X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 4b01a7fa76ce5abd0ade631ac5566804ba657090 Auto-Submitted: auto-generated The branch main has been updated by kevans: URL: https://cgit.FreeBSD.org/src/commit/?id=4b01a7fa76ce5abd0ade631ac5566804ba657090 commit 4b01a7fa76ce5abd0ade631ac5566804ba657090 Author: Kyle Evans AuthorDate: 2024-10-25 21:18:32 +0000 Commit: Kyle Evans CommitDate: 2024-10-25 21:18:40 +0000 Revert "intrng: change multi-interrupt root support type to enum" This reverts commit 536c8d948e8563141356fd41fb8bfe65be289385. The change seemed fine on the surface, but converting to an enum has raised some concerns due to the asm <-> C interface. Back it out and let someone else deal with it later if they'd like to. Further context about the concerns can be found in D47279. --- sys/arm/arm/genassym.c | 4 ++-- sys/arm/arm/gic.c | 2 +- sys/arm/broadcom/bcm2835/bcm2836.c | 2 +- sys/arm/include/intr.h | 6 ------ sys/arm64/arm64/genassym.c | 2 +- sys/arm64/arm64/gic_v3.c | 4 ++-- sys/arm64/arm64/gicv3_its.c | 2 +- sys/arm64/include/intr.h | 10 +++------ sys/kern/pic_if.m | 4 ++-- sys/kern/subr_intr.c | 43 +++++++++++++++++++++++--------------- sys/riscv/include/intr.h | 6 ------ sys/riscv/riscv/intc.c | 2 +- sys/sys/intr.h | 10 +++++---- 13 files changed, 46 insertions(+), 51 deletions(-) diff --git a/sys/arm/arm/genassym.c b/sys/arm/arm/genassym.c index 2cf1861b1178..9d6232739022 100644 --- a/sys/arm/arm/genassym.c +++ b/sys/arm/arm/genassym.c @@ -28,14 +28,15 @@ */ #include +#include #include #include #include +#include #include #include #include #include -#include #include #include #include @@ -48,7 +49,6 @@ #include #include #include -#include #include #include /* For KERNVIRTADDR */ diff --git a/sys/arm/arm/gic.c b/sys/arm/arm/gic.c index ffce86e62128..b1b7aacd63ab 100644 --- a/sys/arm/arm/gic.c +++ b/sys/arm/arm/gic.c @@ -200,7 +200,7 @@ gic_cpu_mask(struct arm_gic_softc *sc) #ifdef SMP static void -arm_gic_init_secondary(device_t dev, enum root_type root_type) +arm_gic_init_secondary(device_t dev, uint32_t rootnum) { struct arm_gic_softc *sc = device_get_softc(dev); u_int irq, cpu; diff --git a/sys/arm/broadcom/bcm2835/bcm2836.c b/sys/arm/broadcom/bcm2835/bcm2836.c index fd34ff8818ad..7ed9dedaa77e 100644 --- a/sys/arm/broadcom/bcm2835/bcm2836.c +++ b/sys/arm/broadcom/bcm2835/bcm2836.c @@ -538,7 +538,7 @@ bcm_lintc_init_pmu_on_ap(struct bcm_lintc_softc *sc, u_int cpu) } static void -bcm_lintc_init_secondary(device_t dev, enum root_type root_type) +bcm_lintc_init_secondary(device_t dev, uint32_t rootnum) { u_int cpu; struct bcm_lintc_softc *sc; diff --git a/sys/arm/include/intr.h b/sys/arm/include/intr.h index 32297f656392..e64edd47dad2 100644 --- a/sys/arm/include/intr.h +++ b/sys/arm/include/intr.h @@ -43,12 +43,6 @@ #include #endif -enum root_type { - INTR_ROOT_IRQ = 0, - - INTR_ROOT_COUNT /* MUST BE LAST */ -}; - #ifndef NIRQ #define NIRQ 1024 /* XXX - It should be an option. */ #endif diff --git a/sys/arm64/arm64/genassym.c b/sys/arm64/arm64/genassym.c index 8612d2eda309..3ca712ca3de3 100644 --- a/sys/arm64/arm64/genassym.c +++ b/sys/arm64/arm64/genassym.c @@ -29,12 +29,12 @@ #include #include #include +#include #include #include #include #include -#include #include #include diff --git a/sys/arm64/arm64/gic_v3.c b/sys/arm64/arm64/gic_v3.c index 750f734a7757..964a129111e2 100644 --- a/sys/arm64/arm64/gic_v3.c +++ b/sys/arm64/arm64/gic_v3.c @@ -1093,7 +1093,7 @@ gic_v3_bind_intr(device_t dev, struct intr_irqsrc *isrc) #ifdef SMP static void -gic_v3_init_secondary(device_t dev, enum root_type root_type) +gic_v3_init_secondary(device_t dev, uint32_t rootnum) { struct gic_v3_setup_periph_args pargs; device_t child; @@ -1140,7 +1140,7 @@ gic_v3_init_secondary(device_t dev, enum root_type root_type) for (i = 0; i < sc->gic_nchildren; i++) { child = sc->gic_children[i]; - PIC_INIT_SECONDARY(child, root_type); + PIC_INIT_SECONDARY(child, rootnum); } } diff --git a/sys/arm64/arm64/gicv3_its.c b/sys/arm64/arm64/gicv3_its.c index 31e23fc01224..5ecd9b8c0e94 100644 --- a/sys/arm64/arm64/gicv3_its.c +++ b/sys/arm64/arm64/gicv3_its.c @@ -1293,7 +1293,7 @@ gicv3_its_setup_intr(device_t dev, struct intr_irqsrc *isrc, #ifdef SMP static void -gicv3_its_init_secondary(device_t dev, enum root_type root_type) +gicv3_its_init_secondary(device_t dev, uint32_t rootnum) { struct gicv3_its_softc *sc; diff --git a/sys/arm64/include/intr.h b/sys/arm64/include/intr.h index c3fe5edc8a6c..38cba6ae8b0d 100644 --- a/sys/arm64/include/intr.h +++ b/sys/arm64/include/intr.h @@ -31,13 +31,6 @@ #include #endif -enum root_type { - INTR_ROOT_IRQ = 0, - INTR_ROOT_FIQ = 1, - - INTR_ROOT_COUNT /* MUST BE LAST */ -}; - #ifndef NIRQ #define NIRQ 16384 /* XXX - It should be an option. */ #endif @@ -53,4 +46,7 @@ arm_irq_memory_barrier(uintptr_t irq) #define ACPI_GPIO_XREF 3 #endif +#define INTR_ROOT_FIQ 1 +#define INTR_ROOT_NUM 2 + #endif /* _MACHINE_INTR_H */ diff --git a/sys/kern/pic_if.m b/sys/kern/pic_if.m index 2d938520b106..f78e787594c5 100644 --- a/sys/kern/pic_if.m +++ b/sys/kern/pic_if.m @@ -74,7 +74,7 @@ CODE { } static void - null_pic_init_secondary(device_t dev, enum root_type root_type) + null_pic_init_secondary(device_t dev, uint32_t rootnum) { } @@ -157,7 +157,7 @@ METHOD void pre_ithread { METHOD void init_secondary { device_t dev; - enum root_type root_type; + uint32_t rootnum; } DEFAULT null_pic_init_secondary; METHOD void ipi_send { diff --git a/sys/kern/subr_intr.c b/sys/kern/subr_intr.c index e88018e58729..b8d85bf20f28 100644 --- a/sys/kern/subr_intr.c +++ b/sys/kern/subr_intr.c @@ -89,6 +89,15 @@ #define INTRNAME_LEN (2*MAXCOMLEN + 1) +/* + * Archs may define multiple roots with INTR_ROOT_NUM to support different kinds + * of interrupts (e.g. arm64 FIQs which use a different exception vector than + * IRQs). + */ +#if !defined(INTR_ROOT_NUM) +#define INTR_ROOT_NUM 1 +#endif + #ifdef DEBUG #define debugf(fmt, args...) do { printf("%s(): ", __func__); \ printf(fmt,##args); } while (0) @@ -106,7 +115,7 @@ struct intr_irq_root { void *arg; }; -static struct intr_irq_root intr_irq_roots[INTR_ROOT_COUNT]; +static struct intr_irq_root intr_irq_roots[INTR_ROOT_NUM]; struct intr_pic_child { SLIST_ENTRY(intr_pic_child) pc_next; @@ -328,16 +337,16 @@ isrc_release_counters(struct intr_irqsrc *isrc) * from the assembler, where CPU interrupt is served. */ void -intr_irq_handler(struct trapframe *tf, u_register_t root_type) +intr_irq_handler(struct trapframe *tf, uint32_t rootnum) { struct trapframe * oldframe; struct thread * td; struct intr_irq_root *root; - KASSERT((uintmax_t)root_type < INTR_ROOT_COUNT, - ("%s: invalid interrupt root %ju", __func__, (uintmax_t)root_type)); + KASSERT(rootnum < INTR_ROOT_NUM, + ("%s: invalid interrupt root %d", __func__, rootnum)); - root = &intr_irq_roots[root_type]; + root = &intr_irq_roots[rootnum]; KASSERT(root->filter != NULL, ("%s: no filter", __func__)); kasan_mark(tf, sizeof(*tf), sizeof(*tf), 0); @@ -486,11 +495,11 @@ isrc_free_irq(struct intr_irqsrc *isrc) } device_t -intr_irq_root_device(enum root_type root_type) +intr_irq_root_device(uint32_t rootnum) { - KASSERT((uintmax_t)root_type < INTR_ROOT_COUNT, - ("%s: invalid interrupt root %ju", __func__, (uintmax_t)root_type)); - return (intr_irq_roots[root_type].dev); + KASSERT(rootnum < INTR_ROOT_NUM, + ("%s: invalid interrupt root %d", __func__, rootnum)); + return (intr_irq_roots[rootnum].dev); } /* @@ -891,7 +900,7 @@ intr_pic_deregister(device_t dev, intptr_t xref) */ int intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter, - void *arg, enum root_type root_type) + void *arg, uint32_t rootnum) { struct intr_pic *pic; struct intr_irq_root *root; @@ -916,9 +925,9 @@ intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter, * Note that we further suppose that there is not threaded interrupt * routine (handler) on the root. See intr_irq_handler(). */ - KASSERT((uintmax_t)root_type < INTR_ROOT_COUNT, - ("%s: invalid interrupt root %ju", __func__, (uintmax_t)root_type)); - root = &intr_irq_roots[root_type]; + KASSERT(rootnum < INTR_ROOT_NUM, + ("%s: invalid interrupt root %d", __func__, rootnum)); + root = &intr_irq_roots[rootnum]; if (root->dev != NULL) { device_printf(dev, "another root already set\n"); return (EBUSY); @@ -1571,16 +1580,16 @@ void intr_pic_init_secondary(void) { device_t dev; - enum root_type root_type; + uint32_t rootnum; /* * QQQ: Only root PICs are aware of other CPUs ??? */ //mtx_lock(&isrc_table_lock); - for (root_type = 0; root_type < INTR_ROOT_COUNT; root_type++) { - dev = intr_irq_roots[root_type].dev; + for (rootnum = 0; rootnum < INTR_ROOT_NUM; rootnum++) { + dev = intr_irq_roots[rootnum].dev; if (dev != NULL) { - PIC_INIT_SECONDARY(dev, root_type); + PIC_INIT_SECONDARY(dev, rootnum); } } //mtx_unlock(&isrc_table_lock); diff --git a/sys/riscv/include/intr.h b/sys/riscv/include/intr.h index 100f1ba40ff3..657781efb620 100644 --- a/sys/riscv/include/intr.h +++ b/sys/riscv/include/intr.h @@ -35,12 +35,6 @@ #ifndef _MACHINE_INTR_MACHDEP_H_ #define _MACHINE_INTR_MACHDEP_H_ -enum root_type { - INTR_ROOT_IRQ = 0, - - INTR_ROOT_COUNT /* MUST BE LAST */ -}; - #ifndef NIRQ #define NIRQ 1024 #endif diff --git a/sys/riscv/riscv/intc.c b/sys/riscv/riscv/intc.c index fcfc0c826fb9..248175e8bea3 100644 --- a/sys/riscv/riscv/intc.c +++ b/sys/riscv/riscv/intc.c @@ -241,7 +241,7 @@ intc_setup_intr(device_t dev, struct intr_irqsrc *isrc, #ifdef SMP static void -intc_init_secondary(device_t dev, enum root_type root_type) +intc_init_secondary(device_t dev, uint32_t rootnum) { struct intc_softc *sc; struct intr_irqsrc *isrc; diff --git a/sys/sys/intr.h b/sys/sys/intr.h index f612fc2744f1..f11e96777927 100644 --- a/sys/sys/intr.h +++ b/sys/sys/intr.h @@ -39,6 +39,8 @@ #define INTR_IRQ_INVALID 0xFFFFFFFF +#define INTR_ROOT_IRQ 0 + enum intr_map_data_type { INTR_MAP_DATA_ACPI = 0, INTR_MAP_DATA_FDT, @@ -113,12 +115,12 @@ u_int intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask); struct intr_pic *intr_pic_register(device_t, intptr_t); int intr_pic_deregister(device_t, intptr_t); int intr_pic_claim_root(device_t, intptr_t, intr_irq_filter_t *, void *, - enum root_type); + uint32_t); int intr_pic_add_handler(device_t, struct intr_pic *, intr_child_irq_filter_t *, void *, uintptr_t, uintptr_t); bool intr_is_per_cpu(struct resource *); -device_t intr_irq_root_device(enum root_type); +device_t intr_irq_root_device(uint32_t); /* Intr interface for BUS. */ @@ -166,7 +168,7 @@ void intr_ipi_send(cpuset_t cpus, u_int ipi); void intr_ipi_dispatch(u_int ipi); #endif -/* Main interrupt handler called from asm on many archs. */ -void intr_irq_handler(struct trapframe *tf, u_register_t root_type); +/* Main interrupt handler called from asm on most archs except riscv. */ +void intr_irq_handler(struct trapframe *tf, uint32_t rootnum); #endif /* _SYS_INTR_H */