From nobody Mon Jul 15 19:15:52 2024 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4WNBkJ5lVMz5RVTq; Mon, 15 Jul 2024 19:15:52 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R11" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4WNBkJ5JHFz4Wgl; Mon, 15 Jul 2024 19:15:52 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1721070952; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=yAxBPDXfYLpgTC8ygs+gYqX3hmB2HyJa89aA0k4ajJw=; b=lamCgb2fIxJuZSl2AHQgShZ0VSw/OXZ+eaCjr4pFTOMY7w1IdVwQLuvG2Eurf15slNov2d 8aXh2iCAglJ1ia2wpufpIhCLoiuBpCG8VqleFIoK3k/xVFQSe8X5UrCTPanCXpm9bCKN1L Us7WBcrxXqHoalN20dJZ7UvTVq2ZhdPc/KvueStY9cX7qUfH2oeUbgXYkKRJ443UiuMXan 8bRemOX9jLwWM8mQT1zHc7MQ+M9YYMlO9mIA0qUIyz9RblUU4fZQ68AnNPhVngnpW5JhCz OrdXw2WaIUGfHaERlgpzE76Jgi0ulT5JdYBMot+jq0PFdvukzq34xND6X7U0oA== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1721070952; a=rsa-sha256; cv=none; b=YjJD4n4J+6o3EP6cGq4MslWszDO47qL92I29NYp84SnHqbzf6U5s28q3efQAmQdgw48t7c 7wwk+ZwNbPEfE6C2GhlVY8yYk1ZOIH+XjuJOG4zvFzkmNxMUPINIcYfCd4uNvL0DCyJk07 yYoeNRkdNEV6IF656n7L00BLtympTz0TnlPiq3CEWc+H1dcQ0ctDs3Q7EvRxt/mML9QUEA j5U7/Y44OPe3tRFPqYKC03wSvP3kBXaqU3RNZHFiCR6mYC80zFjWZqZQFc3D1XrW2aSzT9 qg2xuS0KeEsYawfe/L97r5zwCIJiRj1H9wapEzAt5u2SSMrz9bJtVd8kAyAtsQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1721070952; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=yAxBPDXfYLpgTC8ygs+gYqX3hmB2HyJa89aA0k4ajJw=; b=h+tu1/JdOOlMt/dqA6hvE1pNolriZzdK+L5ZIadQqQv7y/qgz3mMxXawmv0Ab/7OGfMJlq TZnSOTkOavxavCwfWGVyrnk2mOLadUwINWpFqdgfQrFLTyrVIYuGLP5PKNtdLiGQ57xXvq yExCc7rrTnBNs0m68T0LN64pcw/Xm/k87Yy3l1ciWkTWAM8ZHT8ZPZfezqThajtXRU1ipq +/rmXgKMcD8TyNMcMf1CNPVzBhVnJPJF/WXKfU166F9FzmPJytHw1fWPamC+I49LB4yXyA PzcIzje2LCe8U83FjAlvjbsKuOTPC2w7g1RWzGz5K34pYE4dx9B4nW30pNzNYg== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4WNBkJ4mThz14qh; Mon, 15 Jul 2024 19:15:52 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 46FJFq9I039307; Mon, 15 Jul 2024 19:15:52 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 46FJFqdO039304; Mon, 15 Jul 2024 19:15:52 GMT (envelope-from git) Date: Mon, 15 Jul 2024 19:15:52 GMT Message-Id: <202407151915.46FJFqdO039304@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: John Baldwin Subject: git: 0a34d050ae8e - main - acpi: Narrow workaround for broken interrupt settings on x86 List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: jhb X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 0a34d050ae8ea14feddd3d2a62fd2f612613b2c5 Auto-Submitted: auto-generated The branch main has been updated by jhb: URL: https://cgit.FreeBSD.org/src/commit/?id=0a34d050ae8ea14feddd3d2a62fd2f612613b2c5 commit 0a34d050ae8ea14feddd3d2a62fd2f612613b2c5 Author: John Baldwin AuthorDate: 2024-07-15 19:13:08 +0000 Commit: John Baldwin CommitDate: 2024-07-15 19:13:51 +0000 acpi: Narrow workaround for broken interrupt settings on x86 Commit 9a7bf07ccdc1 from 2016 introduced a workaround for some broken BIOSes that specified active-lo instead of active-hi polarity for ISA IRQs for UARTs. The workaround assumed that edge-sensitive ISA IRQs on x86 should always be active-hi. However, some recent AMD systems actually use active-lo edge-sensitive ISA IRQs (and not just for UARTs, but also for the keyboard and PS/2 mouse devices) and the override causes interrupts to be dropped resulting in boot time hangs, non-working keyboards, etc. Add a hw.acpi.override_isa_irq_polarity tunable (readable as a sysctl post-boot) to control this quirk. It can be set to 1 to force enable the override and 0 to disable it. The log of original message mentions an Intel motherboard as the sample case, so default the tunable to 1 on systems with an Intel CPU and 0 otherwise. Special thanks to Matthias Lanter for tracking down boot time issues on recent AMD systems to mismatched interrupt polarity. PR: 270707 Reported by: aixdroix_OSS@protonmail.com, Michael Dexter Reported by: mfw_burn@pm.me, Hannes Hfauswedell Reported by: Matthias Lanter Reported by: William Bulley Reviewed by: imp, emaste MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D45554 --- share/man/man4/acpi.4 | 8 +++++++- sys/dev/acpica/acpi.c | 19 +++++++++++++++++++ sys/dev/acpica/acpi_resource.c | 11 ++++------- sys/dev/acpica/acpivar.h | 12 ++++++++++++ 4 files changed, 42 insertions(+), 8 deletions(-) diff --git a/share/man/man4/acpi.4 b/share/man/man4/acpi.4 index 434e97d529f5..cdad3ceeedfc 100644 --- a/share/man/man4/acpi.4 +++ b/share/man/man4/acpi.4 @@ -23,7 +23,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.Dd October 12, 2021 +.Dd July 15, 2024 .Dt ACPI 4 .Os .Sh NAME @@ -256,6 +256,12 @@ is a valid list of two interfaces .Qq Li FreeBSD and .Qq Li Linux . +.It Va hw.acpi.hw.acpi.override_isa_irq_polarity (x86) +Forces active-lo polarity for edge-triggered ISA interrupts. +Some older systems incorrectly specify active-lo polarity for ISA +interrupts and this override fixes those systems. +This override is enabled by default on systems with Intel CPUs, +but can be enabled or disabled by setting the tunable explicitly. .It Va hw.acpi.reset_video Enables calling the VESA reset BIOS vector on the resume path. This can fix some graphics cards that have problems such as LCD white-out diff --git a/sys/dev/acpica/acpi.c b/sys/dev/acpica/acpi.c index 24d7027f165d..91a1636f2808 100644 --- a/sys/dev/acpica/acpi.c +++ b/sys/dev/acpica/acpi.c @@ -55,6 +55,8 @@ #if defined(__i386__) || defined(__amd64__) #include #include +#include +#include #endif #include #include @@ -297,6 +299,10 @@ int acpi_susp_bounce; SYSCTL_INT(_debug_acpi, OID_AUTO, suspend_bounce, CTLFLAG_RW, &acpi_susp_bounce, 0, "Don't actually suspend, just test devices."); +#if defined(__amd64__) || defined(__i386__) +int acpi_override_isa_irq_polarity; +#endif + /* * ACPI standard UUID for Device Specific Data Package * "Device Properties UUID for _DSD" Rev. 2.0 @@ -611,6 +617,19 @@ acpi_attach(device_t dev) OID_AUTO, "handle_reboot", CTLFLAG_RW, &sc->acpi_handle_reboot, 0, "Use ACPI Reset Register to reboot"); +#if defined(__amd64__) || defined(__i386__) + /* + * Enable workaround for incorrect ISA IRQ polarity by default on + * systems with Intel CPUs. + */ + if (cpu_vendor_id == CPU_VENDOR_INTEL) + acpi_override_isa_irq_polarity = 1; + SYSCTL_ADD_INT(&sc->acpi_sysctl_ctx, SYSCTL_CHILDREN(sc->acpi_sysctl_tree), + OID_AUTO, "override_isa_irq_polarity", CTLFLAG_RDTUN, + &acpi_override_isa_irq_polarity, 0, + "Force active-hi polarity for edge-triggered ISA IRQs"); +#endif + /* * Default to 1 second before sleeping to give some machines time to * stabilize. diff --git a/sys/dev/acpica/acpi_resource.c b/sys/dev/acpica/acpi_resource.c index 87b82a574beb..1257ed30cc65 100644 --- a/sys/dev/acpica/acpi_resource.c +++ b/sys/dev/acpica/acpi_resource.c @@ -159,14 +159,11 @@ acpi_config_intr(device_t dev, ACPI_RESOURCE *res) } #if defined(__amd64__) || defined(__i386__) - /* - * XXX: Certain BIOSes have buggy AML that specify an IRQ that is - * edge-sensitive and active-lo. However, edge-sensitive IRQs - * should be active-hi. Force IRQs with an ISA IRQ value to be - * active-hi instead. - */ - if (irq < 16 && trig == ACPI_EDGE_SENSITIVE && pol == ACPI_ACTIVE_LOW) + if (irq < 16 && trig == ACPI_EDGE_SENSITIVE && pol == ACPI_ACTIVE_LOW && + acpi_override_isa_irq_polarity) { + device_printf(dev, "forcing active-hi polarity for IRQ %u\n", irq); pol = ACPI_ACTIVE_HIGH; + } #endif BUS_CONFIG_INTR(dev, irq, (trig == ACPI_EDGE_SENSITIVE) ? INTR_TRIGGER_EDGE : INTR_TRIGGER_LEVEL, (pol == ACPI_ACTIVE_HIGH) ? diff --git a/sys/dev/acpica/acpivar.h b/sys/dev/acpica/acpivar.h index 2322ab96014b..a71eb9b47eb7 100644 --- a/sys/dev/acpica/acpivar.h +++ b/sys/dev/acpica/acpivar.h @@ -234,6 +234,18 @@ extern int acpi_quirks; #define ACPI_Q_TIMER (1 << 1) #define ACPI_Q_MADT_IRQ0 (1 << 2) +#if defined(__amd64__) || defined(__i386__) +/* + * Certain Intel BIOSes have buggy AML that specify an IRQ that is + * edge-sensitive and active-lo. Normally, edge-sensitive IRQs should + * be active-hi. If this value is non-zero, edge-sensitive ISA IRQs + * are forced to be active-hi instead. At least some AMD systems use + * active-lo edge-sensitive ISA IRQs, so this setting is only enabled + * by default on systems with Intel CPUs. + */ +extern int acpi_override_isa_irq_polarity; +#endif + /* * Plug and play information for device matching. Matching table format * is compatible with ids parameter of ACPI_ID_PROBE bus method.