git: d7623fdcf0f0 - stable/14 - cxgbe(4): Use the correct size for the CIM LA on the T6.

The branch stable/14 has been updated by np:

URL: https://cgit.FreeBSD.org/src/commit/?id=d7623fdcf0f028773afae1b8e1d54c4cd7eccf40

commit d7623fdcf0f028773afae1b8e1d54c4cd7eccf40
Author:     Navdeep Parhar <np@FreeBSD.org>
AuthorDate: 2024-01-09 21:22:16 +0000
Commit:     Navdeep Parhar <np@FreeBSD.org>
CommitDate: 2024-01-11 05:22:31 +0000

    cxgbe(4): Use the correct size for the CIM LA on the T6.
    
    The logic analyzer in the T6 CIM block has a different capture size than
    previous chips.
    
    Sponsored by:   Chelsio Communications
    
    (cherry picked from commit 9ea86c8f67a65ca00f79f3cd83aa977b38589f39)
---
 sys/dev/cxgbe/common/common.h | 1 +
 sys/dev/cxgbe/common/t4_hw.c  | 7 +++++--
 sys/dev/cxgbe/common/t4_hw.h  | 3 ++-
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/sys/dev/cxgbe/common/common.h b/sys/dev/cxgbe/common/common.h
index cd1e648f8e59..0861e3df4bee 100644
--- a/sys/dev/cxgbe/common/common.h
+++ b/sys/dev/cxgbe/common/common.h
@@ -313,6 +313,7 @@ struct chip_params {
 	u32 sge_fl_db;
 	u16 mps_tcam_size;
 	u16 rss_nentries;
+	u16 cim_la_size;
 };
 
 /* VF-only parameters. */
diff --git a/sys/dev/cxgbe/common/t4_hw.c b/sys/dev/cxgbe/common/t4_hw.c
index 41063d5c7d76..c18243e4b681 100644
--- a/sys/dev/cxgbe/common/t4_hw.c
+++ b/sys/dev/cxgbe/common/t4_hw.c
@@ -9303,6 +9303,7 @@ const struct chip_params *t4_get_chip_params(int chipid)
 			.sge_fl_db = F_DBPRIO,
 			.mps_tcam_size = NUM_MPS_CLS_SRAM_L_INSTANCES,
 			.rss_nentries = RSS_NENTRIES,
+			.cim_la_size = CIMLA_SIZE,
 		},
 		{
 			/* T5 */
@@ -9317,6 +9318,7 @@ const struct chip_params *t4_get_chip_params(int chipid)
 			.sge_fl_db = F_DBPRIO | F_DBTYPE,
 			.mps_tcam_size = NUM_MPS_T5_CLS_SRAM_L_INSTANCES,
 			.rss_nentries = RSS_NENTRIES,
+			.cim_la_size = CIMLA_SIZE,
 		},
 		{
 			/* T6 */
@@ -9331,6 +9333,7 @@ const struct chip_params *t4_get_chip_params(int chipid)
 			.sge_fl_db = 0,
 			.mps_tcam_size = NUM_MPS_T5_CLS_SRAM_L_INSTANCES,
 			.rss_nentries = T6_RSS_NENTRIES,
+			.cim_la_size = CIMLA_SIZE_T6,
 		},
 	};
 
@@ -9386,11 +9389,11 @@ int t4_prep_adapter(struct adapter *adapter, u32 *buf)
 	/* Cards with real ASICs have the chipid in the PCIe device id */
 	t4_os_pci_read_cfg2(adapter, PCI_DEVICE_ID, &device_id);
 	if (device_id >> 12 == chip_id(adapter))
-		adapter->params.cim_la_size = CIMLA_SIZE;
+		adapter->params.cim_la_size = adapter->chip_params->cim_la_size;
 	else {
 		/* FPGA */
 		adapter->params.fpga = 1;
-		adapter->params.cim_la_size = 2 * CIMLA_SIZE;
+		adapter->params.cim_la_size = 2 * adapter->chip_params->cim_la_size;
 	}
 
 	ret = get_vpd_params(adapter, &adapter->params.vpd, device_id, buf);
diff --git a/sys/dev/cxgbe/common/t4_hw.h b/sys/dev/cxgbe/common/t4_hw.h
index e943acb8dec9..79ec690cd5e6 100644
--- a/sys/dev/cxgbe/common/t4_hw.h
+++ b/sys/dev/cxgbe/common/t4_hw.h
@@ -66,7 +66,8 @@ enum {
 	CIM_NUM_IBQ    = 6,     /* # of CIM IBQs */
 	CIM_NUM_OBQ    = 6,     /* # of CIM OBQs */
 	CIM_NUM_OBQ_T5 = 8,     /* # of CIM OBQs for T5 adapter */
-	CIMLA_SIZE     = 2048,  /* # of 32-bit words in CIM LA */
+	CIMLA_SIZE     = 256 * 8,  /* 256 rows * ceil(235/32) 32-bit words */
+	CIMLA_SIZE_T6  = 256 * 10, /* 256 rows * ceil(311/32) 32-bit words */
 	CIM_PIFLA_SIZE = 64,    /* # of 192-bit words in CIM PIF LA */
 	CIM_MALA_SIZE  = 64,    /* # of 160-bit words in CIM MA LA */
 	CIM_IBQ_SIZE   = 128,   /* # of 128-bit words in a CIM IBQ */