git: 4fad98b5c8d7 - main - rtwn: remove SEQ_SEL, replace with a QOS bit

From: Adrian Chadd <adrian_at_FreeBSD.org>
Date: Tue, 31 Dec 2024 01:36:03 UTC
The branch main has been updated by adrian:

URL: https://cgit.FreeBSD.org/src/commit/?id=4fad98b5c8d77c771c2dd14e3d4ce517b4bb92d9

commit 4fad98b5c8d77c771c2dd14e3d4ce517b4bb92d9
Author:     Adrian Chadd <adrian@FreeBSD.org>
AuthorDate: 2024-12-15 18:11:57 +0000
Commit:     Adrian Chadd <adrian@FreeBSD.org>
CommitDate: 2024-12-31 01:35:13 +0000

    rtwn: remove SEQ_SEL, replace with a QOS bit
    
    I've reviewed all of the linux vendor and upstream drivers.
    This SEQ_SEL field isn't a mask and doesn't ever look like it
    it was; instead this bit is set to tag QoS data frames.
    
    In fact, it effectively was set to 0 for STA frames and potentially 1
    for broadcast/multicast frames as the STA macid of 0 and broadcast/
    multicast macid of 1 maps to that. In AP modes it would be tagged
    based on bit 0.
    
    So, bring it in line with the vendor and linux drivers.
    
    Locally tested:
    
    * RTL8192CU, STA, hostap
    * RTL8188EU, STA
    * RTL8192EU, STA
    
    Differential Revision:  https://reviews.freebsd.org/D48092
---
 sys/dev/rtwn/rtl8192c/r92c_beacon.c  |  1 -
 sys/dev/rtwn/rtl8192c/r92c_tx.c      | 12 ++++++------
 sys/dev/rtwn/rtl8192c/r92c_tx_desc.h |  3 +--
 3 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/sys/dev/rtwn/rtl8192c/r92c_beacon.c b/sys/dev/rtwn/rtl8192c/r92c_beacon.c
index 8084d5b69438..4646b9317c2f 100644
--- a/sys/dev/rtwn/rtl8192c/r92c_beacon.c
+++ b/sys/dev/rtwn/rtl8192c/r92c_beacon.c
@@ -64,7 +64,6 @@ r92c_beacon_init(struct rtwn_softc *sc, void *buf, int id)
 
 	rtwn_r92c_tx_setup_macid(sc, buf, id);
 	txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE);
-	txd->txdw4 |= htole32(SM(R92C_TXDW4_SEQ_SEL, id));
 	txd->txdw4 |= htole32(SM(R92C_TXDW4_PORT_ID, id));
 	txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, RTWN_RIDX_CCK1));
 }
diff --git a/sys/dev/rtwn/rtl8192c/r92c_tx.c b/sys/dev/rtwn/rtl8192c/r92c_tx.c
index 313f79e216e6..c60081fc675c 100644
--- a/sys/dev/rtwn/rtl8192c/r92c_tx.c
+++ b/sys/dev/rtwn/rtl8192c/r92c_tx.c
@@ -272,7 +272,13 @@ r92c_fill_tx_desc(struct rtwn_softc *sc, struct ieee80211_node *ni,
 	if (ismcast)
 		txd->flags0 |= R92C_FLAGS0_BMCAST;
 
+	if (IEEE80211_IS_QOSDATA(wh))
+		txd->txdw4 |= htole32(R92C_TXDW4_QOS);
+
 	if (!ismcast) {
+		struct rtwn_node *un = RTWN_NODE(ni);
+		macid = un->id;
+
 		/* Unicast frame, check if an ACK is expected. */
 		if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
 		    IEEE80211_QOS_ACKPOLICY_NOACK) {
@@ -281,9 +287,6 @@ r92c_fill_tx_desc(struct rtwn_softc *sc, struct ieee80211_node *ni,
 			    maxretry));
 		}
 
-		struct rtwn_node *un = RTWN_NODE(ni);
-		macid = un->id;
-
 		if (type == IEEE80211_FC0_TYPE_DATA) {
 			qsel = tid % RTWN_MAX_TID;
 
@@ -348,7 +351,6 @@ r92c_fill_tx_desc(struct rtwn_softc *sc, struct ieee80211_node *ni,
 	if (!hasqos) {
 		/* Use HW sequence numbering for non-QoS frames. */
 		rtwn_r92c_tx_setup_hwseq(sc, txd);
-		txd->txdw4 |= htole32(SM(R92C_TXDW4_SEQ_SEL, uvp->id));
 	} else {
 		uint16_t seqno;
 
@@ -409,7 +411,6 @@ r92c_fill_tx_desc_raw(struct rtwn_softc *sc, struct ieee80211_node *ni,
 	if (!IEEE80211_QOS_HAS_SEQ(wh)) {
 		/* Use HW sequence numbering for non-QoS frames. */
 		rtwn_r92c_tx_setup_hwseq(sc, txd);
-		txd->txdw4 |= htole32(SM(R92C_TXDW4_SEQ_SEL, uvp->id));
 	} else {
 		/* Set sequence number. */
 		txd->txdseq |= htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE);
@@ -438,7 +439,6 @@ r92c_fill_tx_desc_null(struct rtwn_softc *sc, void *buf, int is11b,
 
 	if (!qos) {
 		rtwn_r92c_tx_setup_hwseq(sc, txd);
-		txd->txdw4 |= htole32(SM(R92C_TXDW4_SEQ_SEL, id));
 	}
 }
 
diff --git a/sys/dev/rtwn/rtl8192c/r92c_tx_desc.h b/sys/dev/rtwn/rtl8192c/r92c_tx_desc.h
index 6e546c3da236..33edb975f062 100644
--- a/sys/dev/rtwn/rtl8192c/r92c_tx_desc.h
+++ b/sys/dev/rtwn/rtl8192c/r92c_tx_desc.h
@@ -69,8 +69,7 @@ struct r92c_tx_desc {
 	uint32_t	txdw4;
 #define R92C_TXDW4_RTSRATE_M	0x0000001f
 #define R92C_TXDW4_RTSRATE_S	0
-#define R92C_TXDW4_SEQ_SEL_M	0x00000040
-#define R92C_TXDW4_SEQ_SEL_S	6
+#define R92C_TXDW4_QOS		0x00000040 /* BIT(6) for 8188cu/8192cu/8723au */
 #define R92C_TXDW4_HWSEQ_EN	0x00000080
 #define R92C_TXDW4_DRVRATE	0x00000100
 #define R92C_TXDW4_CTS2SELF	0x00000800