git: 2151a0bec08c - stable/12 - mips/malta: Explicitly set AP entry point to _locore

From: Jessica Clarke <jrtc27_at_FreeBSD.org>
Date: Thu, 12 Dec 2024 21:11:26 UTC
The branch stable/12 has been updated by jrtc27:

URL: https://cgit.FreeBSD.org/src/commit/?id=2151a0bec08c5c08ca1e2cc5419a5392bc76a6cd

commit 2151a0bec08c5c08ca1e2cc5419a5392bc76a6cd
Author:     Jessica Clarke <jrtc27@FreeBSD.org>
AuthorDate: 2024-12-12 21:07:14 +0000
Commit:     Jessica Clarke <jrtc27@FreeBSD.org>
CommitDate: 2024-12-12 21:11:15 +0000

    mips/malta: Explicitly set AP entry point to _locore
    
    Otherwise we rely on the firmware implicitly ending up there without
    faulting. Perhaps the hardware this was tested on does so, but on QEMU
    this is not the case, as the AP will otherwise re-run bootloader code
    that tries to reconfigure PCI BARs and ends up faulting, so the AP is
    never seen by FreeBSD to have started.
    
    This matches Linux's arch/mips/kernel/smp-mt.c:vsmp_boot_secondary,
    which unconditionally writes to TCRestart (this register), albeit using
    a separate entry point, whilst ours is shared.
    
    This is a direct commit to stable/13 as mips no longer exists in main.
    
    Obtained from:  CheriBSD (diagnosis; patch rewritten from scratch)
    
    (cherry picked from commit cc521bcf790bdcc76fddd619f35d0279f22e535a)
---
 sys/mips/malta/malta_mp.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/sys/mips/malta/malta_mp.c b/sys/mips/malta/malta_mp.c
index 64aeb3bee93c..efdadae0952d 100644
--- a/sys/mips/malta/malta_mp.c
+++ b/sys/mips/malta/malta_mp.c
@@ -48,6 +48,9 @@ __FBSDID("$FreeBSD$");
 #include <machine/md_var.h>
 #include <machine/smp.h>
 
+void	_locore(__register_t a0, __register_t a1,  __register_t a2,
+	    __register_t a3);
+
 #define	VPECONF0_VPA	(1 << 0)
 #define	MVPCONTROL_VPC	(1 << 1)
 #define	MVPCONF0_PVPE_SHIFT	10
@@ -239,11 +242,8 @@ platform_start_ap(int cpuid)
 
 	set_thread_context(cpuid);
 
-	/*
-	 * Hint: how to set entry point.
-	 * reg = 0x80000000;
-	 * mttc0(2, 3, reg);
-	 */
+	/* Set entry point */
+	mttc0(2, 3, (register_t)&_locore);
 
 	/* Enable thread */
 	reg = mftc0(2, 1);