From nobody Tue Oct 03 22:14:00 2023 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4S0XCr2Xvxz4w4Bh; Tue, 3 Oct 2023 22:14:00 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4S0XCr1bK1z4rXF; Tue, 3 Oct 2023 22:14:00 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1696371240; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=Kc+UCTzy0YX8bEHQHrZSDvQxk1hjCK72V0IivmHurX0=; b=YuGlu+epNq6dCk+MOGqCSjZ4PxJslmQWS3sEFvkBIu0/hz2zxfeUBpZm31A6fu0K53R9NB tCq8x/Dz0nxtWwj3b/R8VLcVUCSOWGnN+AOgryzsQtQQpFTqyLb+dAM5z3E5fBnkBYXzoN x5BVHdbO/ShShEuMyvT8QQjkYrG54g+M2JZMhFI/dj38q0bOCRLHj4rDRq3xsu7Qxgsmru siFSXGZLLp0jb2CdiWucm+zn09vCz+eXJ1wxdvSzimccOQCFMLKrmM0We4W8k6Vb59ET46 3WMnSc2qecC2dPAeQhye9bsIDatjydkjEugIjErneWH/V9wNczhhF/W+WGlPew== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1696371240; a=rsa-sha256; cv=none; b=W1Hxx8ywFvHsuOOTOH/bwlichNaMaPS0yeo+lJnyOphsbSBRGfrKgYUaciDumAzxFFdHy2 GR4LvxojRaLa8xDIkiXO6NIuF1w5w3Q8MhLyx4f5HRkgx1nZZdBpcRwQ/7ECVHd7Fwu/MT VLFusZLhqLgCWWiMUb9yTyKI+fsWKzg7nmOilqfFJttuRX8lsPHu1+LcIbF/iLjoUngi2U 1aopv79zwK+vDIDItQOawYGuXchNvN8uY3+TGqGNmRUyVmbaKiRHT1Y0Y9YcIKFUaFPo/I a7wAxKAIWbbbbWVaWlkC0iLIteKUQZ7wFboigOMyD2G6UttPQltiq5Q1jvfLZQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1696371240; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=Kc+UCTzy0YX8bEHQHrZSDvQxk1hjCK72V0IivmHurX0=; b=ks2GD9SwTNYgPE2G04uaq6jtQCNuYrDrBy8vczPNW1I2/RGcnCVNS0ihbLqGQSE7YW7Qy1 lhD+b5GORbxH+ubFJ7BclOWw0ZqGHw6bNQyPPhCxBj+D5MCUQr1GmjJQXmofWzlWuFagXl bd0xtg6O+gRfTC2YshCyxlfWMxl7t4CUqzqZv+OVEztgtc/KQmlPe/vd9OiokLrzhYZjfC luogW+Dwd5VVgQuiLWdGd8WNS1tyXjdSmqgw2GUaHE53RGFXASF4pnhXHawJjn40cmquxT Q5mPj/X671kxF4Pvue3xlDQlFSMMLxX8iHqGGz37bjawdc9dz+Me5jN5ysWAsw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4S0XCr0h9kz1BZV; Tue, 3 Oct 2023 22:14:00 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 393ME0UP071083; Tue, 3 Oct 2023 22:14:00 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 393ME09A071078; Tue, 3 Oct 2023 22:14:00 GMT (envelope-from git) Date: Tue, 3 Oct 2023 22:14:00 GMT Message-Id: <202310032214.393ME09A071078@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Gordon Tetlow Subject: git: 485912e051bb - releng/13.2 - arm64: Fix errata workarounds that depend on smccc List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: gordon X-Git-Repository: src X-Git-Refname: refs/heads/releng/13.2 X-Git-Reftype: branch X-Git-Commit: 485912e051bbea273a480a24d7f321cc7c06f335 Auto-Submitted: auto-generated The branch releng/13.2 has been updated by gordon: URL: https://cgit.FreeBSD.org/src/commit/?id=485912e051bbea273a480a24d7f321cc7c06f335 commit 485912e051bbea273a480a24d7f321cc7c06f335 Author: Andrew Turner AuthorDate: 2023-09-18 16:34:51 +0000 Commit: Gordon Tetlow CommitDate: 2023-10-03 21:29:11 +0000 arm64: Fix errata workarounds that depend on smccc Some arm64 errata depend on calling into the firmware via the SMCCC interface. This needs to happen after the psci driver has attached as they share the interface. Fix this by allowing the workarounds to mark when they depend on device drivers attaching. This is only an issue on CPU 0 as the workarounds are applied later for the non-boot CPUs. Reviewed by: emaste Approved by: so Security: FreeBSD-SA-23:14.smccc Security: CVE-2023-5370 Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D41916 (cherry picked from commit c643e82dba0b17b2716de4c9d44a3c9c547cbbd5) (cherry picked from commit 843bea18711d726cd2f0a3c3f9144b218e4de3e8) (cherry picked from commit 4df1447f2c76d0db988197f3a05d48e15f976c7c) --- sys/arm64/arm64/cpu_errata.c | 50 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 47 insertions(+), 3 deletions(-) diff --git a/sys/arm64/arm64/cpu_errata.c b/sys/arm64/arm64/cpu_errata.c index 9879e645b827..dfe93a503191 100644 --- a/sys/arm64/arm64/cpu_errata.c +++ b/sys/arm64/arm64/cpu_errata.c @@ -49,6 +49,9 @@ struct cpu_quirks { cpu_quirk_install *quirk_install; u_int midr_mask; u_int midr_value; +#define CPU_QUIRK_POST_DEVICE (1 << 0) /* After device attach */ + /* e.g. needs SMCCC */ + u_int flags; }; static enum { @@ -66,32 +69,38 @@ static struct cpu_quirks cpu_quirks[] = { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A57,0,0), .quirk_install = install_psci_bp_hardening, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A72,0,0), .quirk_install = install_psci_bp_hardening, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A73,0,0), .quirk_install = install_psci_bp_hardening, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A75,0,0), .quirk_install = install_psci_bp_hardening, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX2, 0,0), .quirk_install = install_psci_bp_hardening, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = 0, .midr_value = 0, .quirk_install = install_ssbd_workaround, + .flags = CPU_QUIRK_POST_DEVICE, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, @@ -175,8 +184,8 @@ install_thunderx_bcast_tlbi_workaround(void) } } -void -install_cpu_errata(void) +static void +install_cpu_errata_flags(u_int mask, u_int flags) { u_int midr; size_t i; @@ -185,8 +194,43 @@ install_cpu_errata(void) for (i = 0; i < nitems(cpu_quirks); i++) { if ((midr & cpu_quirks[i].midr_mask) == - cpu_quirks[i].midr_value) { + cpu_quirks[i].midr_value && + (cpu_quirks[i].flags & mask) == flags) { cpu_quirks[i].quirk_install(); } } } + +/* + * Install any CPU errata we need. On CPU 0 we only install the errata that + * don't depend on device drivers as this is called early in the boot process. + * On other CPUs the device drivers have already attached so install all + * applicable errata. + */ +void +install_cpu_errata(void) +{ + /* + * Only install early CPU errata on CPU 0, device drivers may not + * have attached and some workarounds depend on them, e.g. to query + * SMCCC. + */ + if (PCPU_GET(cpuid) == 0) { + install_cpu_errata_flags(CPU_QUIRK_POST_DEVICE, 0); + } else { + install_cpu_errata_flags(0, 0); + } +} + +/* + * Install any errata workarounds that depend on device drivers, e.g. use + * SMCCC to install a workaround. + */ +static void +install_cpu_errata_late(void *dummy __unused) +{ + MPASS(PCPU_GET(cpuid) == 0); + install_cpu_errata_flags(CPU_QUIRK_POST_DEVICE, CPU_QUIRK_POST_DEVICE); +} +SYSINIT(install_cpu_errata_late, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE, + install_cpu_errata_late, NULL);