git: db247798c564 - main - arm64: Hyper-V: vPCI: SPI MSI mapping for gic v3 acpi in arm64
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Date: Wed, 01 Feb 2023 15:40:57 UTC
The branch main has been updated by whu: URL: https://cgit.FreeBSD.org/src/commit/?id=db247798c564021f216803296c07360ddbf2d5e8 commit db247798c564021f216803296c07360ddbf2d5e8 Author: Wei Hu <whu@FreeBSD.org> AuthorDate: 2023-02-01 15:00:18 +0000 Commit: Wei Hu <whu@FreeBSD.org> CommitDate: 2023-02-01 15:40:08 +0000 arm64: Hyper-V: vPCI: SPI MSI mapping for gic v3 acpi in arm64 Microsoft Azure Hyper-V uses SPI to map MSI in ARM64, instead of using LPI IDS. To enable that we need to have gic registered with ACPI_MSI_XREF and gic acpi to map SPI for MSI. This is the 1st of the three patchs to enable Hyper-V vPCI support in arm64. Reviewed by: andrew, emaste, whu Tested by: Souradeep Chakrabarti <schakrabarti@microsoft.com> Obtained from: Souradeep Chakrabarti <schakrabarti@microsoft.com> Sponsored by: Microsoft Differential Revision: https://reviews.freebsd.org/D37763 --- sys/arm64/arm64/gic_v3.c | 7 +++++++ sys/arm64/arm64/gic_v3_acpi.c | 18 +++++++++++++++++- 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/sys/arm64/arm64/gic_v3.c b/sys/arm64/arm64/gic_v3.c index c26158e4035c..07ef8454afcf 100644 --- a/sys/arm64/arm64/gic_v3.c +++ b/sys/arm64/arm64/gic_v3.c @@ -382,6 +382,13 @@ gic_v3_attach(device_t dev) mtx_init(&sc->gic_mbi_mtx, "GICv3 mbi lock", NULL, MTX_DEF); if (sc->gic_mbi_start > 0) { + if (!sc->gic_mbi_end) { + /* + * This is to address SPI based msi ranges, where + * SPI range is not specified in ACPI + */ + sc->gic_mbi_end = sc->gic_nirqs - 1; + } gic_v3_reserve_msi_range(dev, sc->gic_mbi_start, sc->gic_mbi_end - sc->gic_mbi_start); diff --git a/sys/arm64/arm64/gic_v3_acpi.c b/sys/arm64/arm64/gic_v3_acpi.c index d6d5640f9daa..e4a48ea32ca2 100644 --- a/sys/arm64/arm64/gic_v3_acpi.c +++ b/sys/arm64/arm64/gic_v3_acpi.c @@ -50,6 +50,8 @@ __FBSDID("$FreeBSD$"); #define GICV3_PRIV_VGIC 0x80000000 #define GICV3_PRIV_FLAGS 0x80000000 +#define HV_MSI_SPI_START 64 +#define HV_MSI_SPI_LAST 0 struct gic_v3_acpi_devinfo { struct gic_v3_devinfo di_gic_dinfo; @@ -319,7 +321,10 @@ gic_v3_acpi_attach(device_t dev) err = gic_v3_acpi_count_regions(dev); if (err != 0) goto count_error; - + if (vm_guest == VM_GUEST_HV) { + sc->gic_mbi_start = HV_MSI_SPI_START; + sc->gic_mbi_end = HV_MSI_SPI_LAST; + } err = gic_v3_attach(dev); if (err != 0) goto error; @@ -330,6 +335,17 @@ gic_v3_acpi_attach(device_t dev) err = ENXIO; goto error; } + /* + * Registering for MSI with SPI rnage, as this is + * required for Hyper-V GIC to work in ARM64. + */ + if (vm_guest == VM_GUEST_HV) { + err = intr_msi_register(dev, ACPI_MSI_XREF); + if (err) { + device_printf(dev, "could not register MSI\n"); + goto error; + } + } if (intr_pic_claim_root(dev, ACPI_INTR_XREF, arm_gic_v3_intr, sc, GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {