From nobody Thu Aug 10 07:22:11 2023 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4RLyzl5F9wz4qFkj; Thu, 10 Aug 2023 07:22:11 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4RLyzl4qMCz4LvC; Thu, 10 Aug 2023 07:22:11 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1691652131; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=tQXHcZO15cHS0Aed6r1c3fSXNOe+1+/X63fGmCnhQCQ=; b=W1V9vTWoqY7bY+8xpVKcoxL5Ui3L5JnHtXMHZSLKNaU8EeNOiH+cvqjO5EIIAROB1FYOFm Twk3nFAPffZHD/83MUQrsrUUoEC9IRJDsVB7mJjHKW9i+BA6k9lf/6RwgONp33S21Nxlil tWSKXESowspBWeYjKGzbZckQTv2m0oPfms/M/zRaUbXdd21xXNZvbzmdrjyUPtVFgbFONO wDE+FI6ndIVwt68iaVn5oMW2Kr99zuJMyHfJXJzNcCN08CpwbnvAiWsLVL2AKjn2LSj0h3 IEu2cq8aO4Sf6g/RyKF+VJ/w0AamSaTke5iNPeSccBgOtXjrDSbytKs43+UMbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1691652131; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=tQXHcZO15cHS0Aed6r1c3fSXNOe+1+/X63fGmCnhQCQ=; b=GnJXedNNCFjsEGcFJvm2lOn1qfll7oSJi8SXn6Y4naCKonW++Er3m60Ut/qW8m8H3gXa1H nl6YQDn57WffEMBSn2pKhJN8whbCB7hDj+nhwI1oyEB1vh39WEZTo2t3sl7tgNKlw9mJFT F8ih4VNFB6TxyekeQUVlZO7iHj05j/ajBjrgPn7iZKjTaJQnB/fnNIJCIGC1uYmZn6JUr2 4IH5khqWXYF1S4KDxJE33YyZ0q/F/+uXSonklheU9+X3vLcEtBmSdNiI40WOyn7muN3b9t +WetWPClJ5ul0u/+wxVteX1EVGdRn6FfGpzB+4YJPhIrRFE3g20eFTbE2iQ0Sw== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1691652131; a=rsa-sha256; cv=none; b=NI56RbjWPzQ0mYvFeKdlkeBuPfQVVmOOtqOt/5Tl+bytkheBGVBg3seD212jbwXPZjUCnj QAAs+e5YVurXruiVhcMko7VnHJYkMcMZfU0O8FkJyYe8zRvnoNp0B3K/TGY8cSyqYV4Mh3 bPLFlY2k8dRo55QLiTAzvuIKHSR1j6mu+nd+AU3EooUK9Gdzd2LIdEWWPOKJhSj0YsDuuS wc8lyab8g56+WbRSIX+V+oxSXygwJjHf2kMaKx0RypjqUmaiM2xueAiQCwE3sZL9PsUiWX teOQ2k8pD7bltr90r3SYqLnbRtLshigXKfKos7t9SdC79e1ECPXDQJQk/vSdrg== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4RLyzl3vvkznhp; Thu, 10 Aug 2023 07:22:11 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 37A7MBl2023217; Thu, 10 Aug 2023 07:22:11 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 37A7MBTe023214; Thu, 10 Aug 2023 07:22:11 GMT (envelope-from git) Date: Thu, 10 Aug 2023 07:22:11 GMT Message-Id: <202308100722.37A7MBTe023214@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Emmanuel Vadot Subject: git: b07fed8180a6 - main - arm: xilinx: gpio: Make the driver more generic List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: manu X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: b07fed8180a6b97f44c7d900d17b94fa3f1974cf Auto-Submitted: auto-generated The branch main has been updated by manu: URL: https://cgit.FreeBSD.org/src/commit/?id=b07fed8180a6b97f44c7d900d17b94fa3f1974cf commit b07fed8180a6b97f44c7d900d17b94fa3f1974cf Author: Emmanuel Vadot AuthorDate: 2022-09-29 08:05:19 +0000 Commit: Emmanuel Vadot CommitDate: 2023-08-10 07:21:55 +0000 arm: xilinx: gpio: Make the driver more generic All other Zynq SoCs have the same GPIO controller, the only difference is the number of banks/pins so make this driver more generic to add other SoCs more easily. No functional changes intended. Sponsored by: Beckhoff Automation GmbH & Co. KG MFC after: 2 weeks --- sys/arm/xilinx/zy7_gpio.c | 120 +++++++++++++++++++++++++++++++++++----------- 1 file changed, 93 insertions(+), 27 deletions(-) diff --git a/sys/arm/xilinx/zy7_gpio.c b/sys/arm/xilinx/zy7_gpio.c index 9e9cf2b7f86a..d487fc8e79d1 100644 --- a/sys/arm/xilinx/zy7_gpio.c +++ b/sys/arm/xilinx/zy7_gpio.c @@ -70,16 +70,30 @@ __FBSDID("$FreeBSD$"); #include "gpio_if.h" -#define NUMBANKS 4 -#define MAXPIN (32*NUMBANKS) - -#define MIO_PIN 0 /* pins 0-53 go to MIO */ -#define NUM_MIO_PINS 54 -#define EMIO_PIN 64 /* pins 64-127 go to PL */ -#define NUM_EMIO_PINS 64 - -#define VALID_PIN(u) (((u) >= MIO_PIN && (u) < MIO_PIN + NUM_MIO_PINS) || \ - ((u) >= EMIO_PIN && (u) < EMIO_PIN + NUM_EMIO_PINS)) +#define ZYNQ_MAX_BANK 4 + +/* Zynq 7000 */ +#define ZYNQ_BANK0_PIN_MIN 0 +#define ZYNQ_BANK0_NPIN 32 +#define ZYNQ_BANK1_PIN_MIN 32 +#define ZYNQ_BANK1_NPIN 22 +#define ZYNQ_BANK2_PIN_MIN 64 +#define ZYNQ_BANK2_NPIN 32 +#define ZYNQ_BANK3_PIN_MIN 96 +#define ZYNQ_BANK3_NPIN 32 +#define ZYNQ_PIN_MIO_MIN 0 +#define ZYNQ_PIN_MIO_MAX 54 +#define ZYNQ_PIN_EMIO_MIN 64 +#define ZYNQ_PIN_EMIO_MAX 118 + +#define ZYNQ_BANK_NPIN(bank) (ZYNQ_BANK##bank##_NPIN) +#define ZYNQ_BANK_PIN_MIN(bank) (ZYNQ_BANK##bank##_PIN_MIN) +#define ZYNQ_BANK_PIN_MAX(bank) (ZYNQ_BANK##bank##_PIN_MIN + ZYNQ_BANK##bank##_NPIN - 1) + +#define ZYNQ_PIN_IS_MIO(pin) (pin >= ZYNQ_PIN_MIO_MIN && \ + pin <= ZYNQ_PIN_MIO_MAX) +#define ZYNQ_PIN_IS_EMIO(pin) (pin >= ZYNQ_PIN_EMIO_MIN && \ + pin <= ZYNQ_PIN_EMIO_MAX) #define ZGPIO_LOCK(sc) mtx_lock(&(sc)->sc_mtx) #define ZGPIO_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) @@ -88,11 +102,39 @@ __FBSDID("$FreeBSD$"); "gpio", MTX_DEF) #define ZGPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); +struct zynq_gpio_conf { + char *name; + uint32_t nbanks; + uint32_t maxpin; + uint32_t bank_min[ZYNQ_MAX_BANK]; + uint32_t bank_max[ZYNQ_MAX_BANK]; +}; + struct zy7_gpio_softc { - device_t dev; - device_t busdev; - struct mtx sc_mtx; - struct resource *mem_res; /* Memory resource */ + device_t dev; + device_t busdev; + struct mtx sc_mtx; + struct resource *mem_res; /* Memory resource */ + struct zynq_gpio_conf *conf; +}; + +static struct zynq_gpio_conf z7_gpio_conf = { + .name = "Zynq-7000 GPIO Controller", + .nbanks = ZYNQ_MAX_BANK, + .maxpin = ZYNQ_PIN_EMIO_MAX, + .bank_min[0] = ZYNQ_BANK_PIN_MIN(0), + .bank_max[0] = ZYNQ_BANK_PIN_MAX(0), + .bank_min[1] = ZYNQ_BANK_PIN_MIN(1), + .bank_max[1] = ZYNQ_BANK_PIN_MAX(1), + .bank_min[2] = ZYNQ_BANK_PIN_MIN(2), + .bank_max[2] = ZYNQ_BANK_PIN_MAX(2), + .bank_min[3] = ZYNQ_BANK_PIN_MIN(3), + .bank_max[3] = ZYNQ_BANK_PIN_MAX(3), +}; + +static struct ofw_compat_data compat_data[] = { + {"xlnx,zy7_gpio", (uintptr_t)&z7_gpio_conf}, + {NULL, 0}, }; #define WR4(sc, off, val) bus_write_4((sc)->mem_res, (off), (val)) @@ -128,17 +170,37 @@ zy7_gpio_get_bus(device_t dev) static int zy7_gpio_pin_max(device_t dev, int *maxpin) { + struct zy7_gpio_softc *sc; - *maxpin = MAXPIN; + sc = device_get_softc(dev); + *maxpin = sc->conf->maxpin; return (0); } +static inline bool +zy7_pin_valid(device_t dev, uint32_t pin) +{ + struct zy7_gpio_softc *sc; + int i; + bool found = false; + + sc = device_get_softc(dev); + for (i = 0; i < sc->conf->nbanks; i++) { + if (pin >= sc->conf->bank_min[i] && pin <= sc->conf->bank_max[i]) { + found = true; + break; + } + } + + return (found); +} + /* Get a specific pin's capabilities. */ static int zy7_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) { - if (!VALID_PIN(pin)) + if (!zy7_pin_valid(dev, pin)) return (EINVAL); *caps = (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE); @@ -151,14 +213,14 @@ static int zy7_gpio_pin_getname(device_t dev, uint32_t pin, char *name) { - if (!VALID_PIN(pin)) + if (!zy7_pin_valid(dev, pin)) return (EINVAL); - if (pin < NUM_MIO_PINS) { + if (ZYNQ_PIN_IS_MIO(pin)) { snprintf(name, GPIOMAXNAME, "MIO_%d", pin); name[GPIOMAXNAME - 1] = '\0'; } else { - snprintf(name, GPIOMAXNAME, "EMIO_%d", pin - EMIO_PIN); + snprintf(name, GPIOMAXNAME, "EMIO_%d", pin - ZYNQ_PIN_EMIO_MIN); name[GPIOMAXNAME - 1] = '\0'; } @@ -171,7 +233,7 @@ zy7_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) { struct zy7_gpio_softc *sc = device_get_softc(dev); - if (!VALID_PIN(pin)) + if (!zy7_pin_valid(dev, pin)) return (EINVAL); ZGPIO_LOCK(sc); @@ -197,7 +259,7 @@ zy7_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) { struct zy7_gpio_softc *sc = device_get_softc(dev); - if (!VALID_PIN(pin)) + if (!zy7_pin_valid(dev, pin)) return (EINVAL); ZGPIO_LOCK(sc); @@ -234,7 +296,7 @@ zy7_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) { struct zy7_gpio_softc *sc = device_get_softc(dev); - if (!VALID_PIN(pin) || value > 1) + if (!zy7_pin_valid(dev, pin) || value > 1) return (EINVAL); /* Fancy register tricks allow atomic set or reset. */ @@ -256,7 +318,7 @@ zy7_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value) { struct zy7_gpio_softc *sc = device_get_softc(dev); - if (!VALID_PIN(pin)) + if (!zy7_pin_valid(dev, pin)) return (EINVAL); *value = (RD4(sc, ZY7_GPIO_DATA_RO(pin >> 5)) >> (pin & 31)) & 1; @@ -270,7 +332,7 @@ zy7_gpio_pin_toggle(device_t dev, uint32_t pin) { struct zy7_gpio_softc *sc = device_get_softc(dev); - if (!VALID_PIN(pin)) + if (!zy7_pin_valid(dev, pin)) return (EINVAL); ZGPIO_LOCK(sc); @@ -286,14 +348,16 @@ zy7_gpio_pin_toggle(device_t dev, uint32_t pin) static int zy7_gpio_probe(device_t dev) { + struct zynq_gpio_conf *conf; if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (!ofw_bus_is_compatible(dev, "xlnx,zy7_gpio")) + conf = (struct zynq_gpio_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data; + if (conf == 0) return (ENXIO); - device_set_desc(dev, "Zynq-7000 GPIO driver"); + device_set_desc(dev, conf->name); return (0); } @@ -306,6 +370,7 @@ zy7_gpio_attach(device_t dev) int rid; sc->dev = dev; + sc->conf = (struct zynq_gpio_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data; ZGPIO_LOCK_INIT(sc); @@ -372,4 +437,5 @@ static driver_t zy7_gpio_driver = { sizeof(struct zy7_gpio_softc), }; -DRIVER_MODULE(zy7_gpio, simplebus, zy7_gpio_driver, NULL, NULL); +EARLY_DRIVER_MODULE(zy7_gpio, simplebus, zy7_gpio_driver, 0, 0, + BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);