From nobody Fri Nov 18 10:02:48 2022 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4NDC5P4LzFz4j46x; Fri, 18 Nov 2022 10:02:49 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4NDC5P0X1Gz3FNk; Fri, 18 Nov 2022 10:02:49 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1668765769; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=oL7JxmGGNjWG+zqHs48H/WGkh7Miwo0pLXG4zoj51v4=; b=uNHoglcCoROwFOHLEf6lyzpmdIkSfBWL2fbc6erFCd8Eu4t1563coQ5bzmfH0ynXq/HSGA 8HA3p75d3JFMn8RpuCygQubmld5J/foBskh2cp2kW7ZxK8ZQmt0B6Dz1JnZMFABZW+Vvkh hY1D+V6rjVOUst+13WaVrCLKKJUuzYtcfKE/Y3g7U0ec4Bkymuwg3jPtGPIZdap0a6JVgL XdOKup1JzQ9onMwmpyLeepOzG0MP0a6gNJQfBaUNOLBWmYuHILz1R0vl30cykFbZ8eP/Fl zcuGsCniUg6JMfCQorAS+u0TQhjqJ/YZG+CsCKwws/y36P0+tk7xDwUZ6mvBjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1668765769; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=oL7JxmGGNjWG+zqHs48H/WGkh7Miwo0pLXG4zoj51v4=; b=G4gzJk6yoYEMpHtoSQZGSfJB0RgSqbBcjTPueV6m2xisD/kiPYhtbnqvhoUzTAZAvCLSqm oBNUOeDRNs2q4ezYrfx6yjtPyCx0oUi7zJHJ0EJTvS9fweWxR4wZcqMHB6V7sybs8QgPho 25dOexiY1cs28kh2KfQTwwRnwRZVbceHusRw+KoiJaVLQ+VeteVfaOj6owDT4n4JnJjjrI v5u5NOdFadlJ29SxChONMmYWVKBkycD2yRgRio6FtGvrEozdrCqholARGguzUBM31It/nT aW6/jxCScTrdGfjrlAioTWb/ccw9PvghuKXDCa4+WaTCx6CxwSBC+ujhgL7dNQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1668765769; a=rsa-sha256; cv=none; b=obJpAlaw2Z2Q8ekeH0Xs3WEjg/p+2A0SP1M6C3MLQ2Zj/n97nh3hOdWnlhTFjQlXBUFqTB 30g4cVGeag8ZzgKDDCEHVSuARNUo4ilpzuxUUyh4PQsH8HNTzsRPkN+Oobv9CmJXwOKLUA Y6xDqPEMbuP2mG2NS1oKKFfP+8iv7bQ2aEUnNcQgvwEpsG0B4eXqn7aydak1aX7lVt2MFj +tdK5yFdMNHP2msyjVIz8CUd1xvGM8m+K83ZsL4fkQTacYaBmo3idVIMTCQ9rS/YfJaQKc O4iUzcDzkbYemBLwLugyIz0bETIJTdOwZ9fFN4gzbcqH9aUUF/TKTYqCYXqrCQ== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4NDC5N6R6cz1Gj9; Fri, 18 Nov 2022 10:02:48 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 2AIA2m80018882; Fri, 18 Nov 2022 10:02:48 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 2AIA2m77018881; Fri, 18 Nov 2022 10:02:48 GMT (envelope-from git) Date: Fri, 18 Nov 2022 10:02:48 GMT Message-Id: <202211181002.2AIA2m77018881@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Olivier Houchard Subject: git: e5c0e6d7810c - stable/12 - arm: Fix handling of undefined instruction aborts in THUMB2 mode. List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: cognet X-Git-Repository: src X-Git-Refname: refs/heads/stable/12 X-Git-Reftype: branch X-Git-Commit: e5c0e6d7810cbfc57b80f123ca48b485bdcd48d1 Auto-Submitted: auto-generated X-ThisMailContainsUnwantedMimeParts: N The branch stable/12 has been updated by cognet: URL: https://cgit.FreeBSD.org/src/commit/?id=e5c0e6d7810cbfc57b80f123ca48b485bdcd48d1 commit e5c0e6d7810cbfc57b80f123ca48b485bdcd48d1 Author: Michal Meloun AuthorDate: 2021-10-17 17:36:33 +0000 Commit: Olivier Houchard CommitDate: 2022-11-18 09:45:31 +0000 arm: Fix handling of undefined instruction aborts in THUMB2 mode. Correctly recognize NEON/SIMD and VFP instructions in THUMB2 mode and pass these to the appropriate handler. Note that it is not necessary to filter all undefined instruction variant or register combinations, this is a job for given handler. Reported by: Robert Clausecker PR: 259187 MFC after: 2 weks (cherry picked from commit a670e1c13a522df4fb8c63bb023b88b1d65de797) Signed-off-by: Olivier Houchard --- sys/arm/arm/undefined.c | 39 +++++++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 16 deletions(-) diff --git a/sys/arm/arm/undefined.c b/sys/arm/arm/undefined.c index f6fd5bfab266..74ed1c2acc41 100644 --- a/sys/arm/arm/undefined.c +++ b/sys/arm/arm/undefined.c @@ -91,13 +91,25 @@ __FBSDID("$FreeBSD$"); #define ARM_COPROC_INSN(insn) (((insn) & (1 << 27)) != 0) #define ARM_VFP_INSN(insn) ((((insn) & 0xfe000000) == 0xf2000000) || \ - (((insn) & 0xff100000) == 0xf4000000)) + (((insn) & 0xff100000) == 0xf4000000)) #define ARM_COPROC(insn) (((insn) >> 8) & 0xf) -#define THUMB_32BIT_INSN(insn) ((insn) >= 0xe800) +#define THUMB_32BIT_INSN(insn) ((((insn) & 0xe000) == 0xe000) && \ + (((insn) & 0x1800) != 0)) +/* + * Coprocessor, Advanced SIMD, and + * Floating-point instructions on page A6-251 + * OP1 == 01 OR 11 + * OP2 == 1xxxxxx + */ #define THUMB_COPROC_INSN(insn) (((insn) & (3 << 26)) == (3 << 26)) -#define THUMB_COPROC_UNDEFINED(insn) (((insn) & 0x3e << 20) == 0) -#define THUMB_VFP_INSN(insn) (((insn) & (3 << 24)) == (3 << 24)) +/* + * Advanced SIMD element or structure + * load/store instructions on page A7-275 + * OP1 == 11 + * OP2 == 001xxx0 +*/ +#define THUMB_VFP_INSN(insn) (((insn) & (0x1F1 << 20)) == (0x190 << 20)) #define THUMB_COPROC(insn) (((insn) >> 8) & 0xf) #define COPROC_VFP 10 @@ -282,18 +294,13 @@ undefinedinstruction(struct trapframe *frame) fault_instruction <<= 16; fault_instruction |= *(uint16_t *)(fault_pc + 2); - /* - * Is it a Coprocessor, Advanced SIMD, or - * Floating-point instruction. - */ - if (THUMB_COPROC_INSN(fault_instruction)) { - if (THUMB_COPROC_UNDEFINED(fault_instruction)) { - /* undefined insn */ - } else if (THUMB_VFP_INSN(fault_instruction)) - coprocessor = COPROC_VFP; - else - coprocessor = - THUMB_COPROC(fault_instruction); + /* Coprocessor, Advanced SIMD and Floating-point */ + if (THUMB_COPROC_INSN(fault_instruction)) + coprocessor = THUMB_COPROC(fault_instruction); + else { + /* Advanced SIMD load/store */ + if (THUMB_VFP_INSN(fault_instruction)) + coprocessor = COPROC_VFP; /* SIMD */ } } #else