git: 477204e70b65 - main - Decode all Arm GIC feature ID bits

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=477204e70b658c518064a02203a2050d5a0841be

commit 477204e70b658c518064a02203a2050d5a0841be
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2022-05-24 10:03:13 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2022-05-24 10:04:57 +0000

    Decode all Arm GIC feature ID bits
    
    The AWS Graviton3 CPU features a GIC 4.1 CPU Interface. Teach the CPU
    identift code to decode it.
    
    Sponsored by:   The FreeBSD Foundation
---
 sys/arm64/arm64/identcpu.c | 3 +++
 sys/arm64/include/armreg.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
index 8ad604ceb754..def7c0c0838b 100644
--- a/sys/arm64/arm64/identcpu.c
+++ b/sys/arm64/arm64/identcpu.c
@@ -1127,6 +1127,9 @@ static struct mrs_field_value id_aa64pfr0_ras[] = {
 
 static struct mrs_field_value id_aa64pfr0_gic[] = {
 	MRS_FIELD_VALUE_NONE_IMPL(ID_AA64PFR0, GIC, CPUIF_NONE, CPUIF_EN),
+	MRS_FIELD_VALUE(ID_AA64PFR0_GIC_CPUIF_NONE, ""),
+	MRS_FIELD_VALUE(ID_AA64PFR0_GIC_CPUIF_EN, "GIC"),
+	MRS_FIELD_VALUE(ID_AA64PFR0_GIC_CPUIF_4_1, "GIC 4.1"),
 	MRS_FIELD_VALUE_END,
 };
 
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index 44b11617fbf1..c16c5b77f3c0 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -891,6 +891,7 @@
 #define	ID_AA64PFR0_GIC_VAL(x)		((x) & ID_AA64PFR0_GIC_MASK)
 #define	 ID_AA64PFR0_GIC_CPUIF_NONE	(UL(0x0) << ID_AA64PFR0_GIC_SHIFT)
 #define	 ID_AA64PFR0_GIC_CPUIF_EN	(UL(0x1) << ID_AA64PFR0_GIC_SHIFT)
+#define	 ID_AA64PFR0_GIC_CPUIF_4_1	(UL(0x3) << ID_AA64PFR0_GIC_SHIFT)
 #define	ID_AA64PFR0_RAS_SHIFT		28
 #define	ID_AA64PFR0_RAS_MASK		(UL(0xf) << ID_AA64PFR0_RAS_SHIFT)
 #define	ID_AA64PFR0_RAS_VAL(x)		((x) & ID_AA64PFR0_RAS_MASK)