Re: git: 1a4614a51ee7 - main - hwpmc: Bump Intel's IA32_PERFEVTSELx width to 64 bits.
Date: Thu, 02 Jun 2022 17:39:47 UTC
are you going to do enough work to unbreak: pmc stat -- foo ?
On 6/2/22, Alexander Motin <mav@freebsd.org> wrote:
> The branch main has been updated by mav:
>
> URL:
> https://cgit.FreeBSD.org/src/commit/?id=1a4614a51ee7e3d3cd4ef30b16e13f9ef1713a56
>
> commit 1a4614a51ee7e3d3cd4ef30b16e13f9ef1713a56
> Author: Alexander Motin <mav@FreeBSD.org>
> AuthorDate: 2022-06-02 17:08:55 +0000
> Commit: Alexander Motin <mav@FreeBSD.org>
> CommitDate: 2022-06-02 17:08:55 +0000
>
> hwpmc: Bump Intel's IA32_PERFEVTSELx width to 64 bits.
>
> Haswell added there bits 32/33 for TSX, and AlderLake added bit 34
> for Adaptive PEBS Record.
>
> MFC after: 1 month
> ---
> sys/dev/hwpmc/hwpmc_core.c | 5 +++--
> sys/dev/hwpmc/hwpmc_core.h | 40 ++++++++++++++++++++++------------------
> sys/dev/hwpmc/hwpmc_uncore.c | 2 +-
> sys/dev/hwpmc/hwpmc_uncore.h | 4 ++--
> 4 files changed, 28 insertions(+), 23 deletions(-)
>
> diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c
> index 1b3c59163141..a2607ca1d9e3 100644
> --- a/sys/dev/hwpmc/hwpmc_core.c
> +++ b/sys/dev/hwpmc/hwpmc_core.c
> @@ -226,7 +226,8 @@ iaf_allocate_pmc(int cpu, int ri, struct pmc *pm,
> const struct pmc_op_pmcallocate *a)
> {
> uint8_t ev, umask;
> - uint32_t caps, flags, config;
> + uint32_t caps;
> + uint64_t config, flags;
> const struct pmc_md_iap_op_pmcallocate *iap;
>
> KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
> @@ -907,7 +908,7 @@ static int
> iap_start_pmc(int cpu, int ri)
> {
> struct pmc *pm;
> - uint32_t evsel;
> + uint64_t evsel;
> struct core_cpu *cc;
>
> KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
> diff --git a/sys/dev/hwpmc/hwpmc_core.h b/sys/dev/hwpmc/hwpmc_core.h
> index 5b42182a876c..b75146d8b590 100644
> --- a/sys/dev/hwpmc/hwpmc_core.h
> +++ b/sys/dev/hwpmc/hwpmc_core.h
> @@ -48,7 +48,7 @@
> * Programmable PMCs.
> */
> struct pmc_md_iap_op_pmcallocate {
> - uint32_t pm_iap_config;
> + uint64_t pm_iap_config;
> uint64_t pm_iap_rsp;
> };
>
> @@ -75,9 +75,8 @@ struct pmc_md_iap_op_pmcallocate {
> * Fixed-function counters.
> */
>
> -#define IAF_MASK 0xF
> +#define IAF_MASK 0x000000010000000f
>
> -#define IAF_COUNTER_MASK 0x0000ffffffffffff
> #define IAF_CTR0 0x309
> #define IAF_CTR1 0x30A
> #define IAF_CTR2 0x30B
> @@ -86,7 +85,17 @@ struct pmc_md_iap_op_pmcallocate {
> * The IAF_CTRL MSR is laid out in the following way.
> *
> * Bit Position Use
> - * 63 - 12 Reserved (do not touch)
> + * 63 - 45 Reserved (do not touch)
> + * 44 Ctr 3 Adaptive Record (v5)
> + * 43 - 41 Reserved (do not touch)
> + * 40 Ctr 2 Adaptive Record (v5)
> + * 39 - 37 Reserved (do not touch)
> + * 36 Ctr 1 Adaptive Record (v5)
> + * 35 - 33 Reserved (do not touch)
> + * 32 Ctr 0 Adaptive Record (v5)
> + * 15 Ctr 3 PMI
> + * 14 Ctr 3 Any Thread (v3)
> + * 13-12 Ctr 3 Enable
> * 11 Ctr 2 PMI
> * 10 Ctr 2 Any Thread (v3)
> * 9-8 Ctr 2 Enable
> @@ -100,7 +109,6 @@ struct pmc_md_iap_op_pmcallocate {
>
> #define IAF_OFFSET 32
> #define IAF_CTRL 0x38D
> -#define IAF_CTRL_MASK 0x0000000000000fff
>
> /*
> * Programmable counters.
> @@ -113,7 +121,10 @@ struct pmc_md_iap_op_pmcallocate {
> * IAP_EVSEL(n) is laid out in the following way.
> *
> * Bit Position Use
> - * 63-31 Reserved (do not touch)
> + * 63-35 Reserved (do not touch)
> + * 34 Adaptive Record (v5)
> + * 33 IN_TX (v3)
> + * 32 IN_TXCP (v3)
> * 31-24 Counter Mask
> * 23 Invert
> * 22 Enable
> @@ -127,7 +138,6 @@ struct pmc_md_iap_op_pmcallocate {
> * 7-0 Event Select
> */
>
> -#define IAP_EVSEL_MASK 0x00000000ffffffff
> #define IAP_EVSEL0 0x186
>
> /*
> @@ -142,22 +152,16 @@ struct pmc_md_iap_op_pmcallocate {
> * IA_GLOBAL_CTRL is laid out in the following way.
> *
> * Bit Position Use
> - * 63-35 Reserved (do not touch)
> + * 63-49 Reserved (do not touch)
> + * 48 Perf Metrics Enable (v5)
> + * 47-36 Reserved (do not touch)
> + * 35 IAF Counter 3 Enable
> * 34 IAF Counter 2 Enable
> * 33 IAF Counter 1 Enable
> * 32 IAF Counter 0 Enable
> * 31-0 Depends on programmable counters
> */
>
> -/* The mask is only for the fixed porttion of the register. */
> -#define IAF_GLOBAL_CTRL_MASK 0x0000000700000000
> -
> -/* The mask is only for the programmable porttion of the register. */
> -#define IAP_GLOBAL_CTRL_MASK 0x00000000ffffffff
> -
> -/* The mask is for both the fixed and programmable porttions of the
> register. */
> -#define IA_GLOBAL_CTRL_MASK 0x00000007ffffffff
> -
> #define IA_GLOBAL_OVF_CTRL 0x390
> #define IA_GLOBAL_STATUS_RESET 0x390
> #define IA_GLOBAL_STATUS_SET 0x391 /* v4 */
> @@ -183,7 +187,7 @@ struct pmc_md_iaf_pmc {
> };
>
> struct pmc_md_iap_pmc {
> - uint32_t pm_iap_evsel;
> + uint64_t pm_iap_evsel;
> uint64_t pm_iap_rsp;
> };
>
> diff --git a/sys/dev/hwpmc/hwpmc_uncore.c b/sys/dev/hwpmc/hwpmc_uncore.c
> index 93e41e8d91f1..f69b21e173d5 100644
> --- a/sys/dev/hwpmc/hwpmc_uncore.c
> +++ b/sys/dev/hwpmc/hwpmc_uncore.c
> @@ -649,7 +649,7 @@ static int
> ucp_start_pmc(int cpu, int ri)
> {
> struct pmc *pm;
> - uint32_t evsel;
> + uint64_t evsel;
> struct uncore_cpu *cc;
>
> KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
> diff --git a/sys/dev/hwpmc/hwpmc_uncore.h b/sys/dev/hwpmc/hwpmc_uncore.h
> index ac1623e7737e..5e8610f77ddf 100644
> --- a/sys/dev/hwpmc/hwpmc_uncore.h
> +++ b/sys/dev/hwpmc/hwpmc_uncore.h
> @@ -45,7 +45,7 @@ struct pmc_md_ucf_op_pmcallocate {
> * Programmable PMCs.
> */
> struct pmc_md_ucp_op_pmcallocate {
> - uint32_t pm_ucp_config;
> + uint64_t pm_ucp_config;
> };
>
> #define UCP_EVSEL(C) ((C) & 0xFF)
> @@ -106,7 +106,7 @@ struct pmc_md_ucf_pmc {
> };
>
> struct pmc_md_ucp_pmc {
> - uint32_t pm_ucp_evsel;
> + uint64_t pm_ucp_evsel;
> };
>
> /*
>
--
Mateusz Guzik <mjguzik gmail.com>