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Wed, 13 Jul 2022 11:50:44 GMT (envelope-from git) Date: Wed, 13 Jul 2022 11:50:44 GMT Message-Id: <202207131150.26DBoiY8053670@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Dmitry Chagin Subject: git: 6fddab804a17 - stable/13 - amd64: Reload CPU ext features after resume or cr4 changes List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: dchagin X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 6fddab804a17762d4f77bc92725ded7bbee5789a Auto-Submitted: auto-generated ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; 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mx1.freebsd.org; none X-ThisMailContainsUnwantedMimeParts: N The branch stable/13 has been updated by dchagin: URL: https://cgit.FreeBSD.org/src/commit/?id=6fddab804a17762d4f77bc92725ded7bbee5789a commit 6fddab804a17762d4f77bc92725ded7bbee5789a Author: Dmitry Chagin AuthorDate: 2022-06-29 07:34:43 +0000 Commit: Dmitry Chagin CommitDate: 2022-07-13 11:48:49 +0000 amd64: Reload CPU ext features after resume or cr4 changes Reviewed by: kib Differential revision: https://reviews.freebsd.org/D35555 MFC after: 2 weeks (cherry picked from commit 050f5a8405c63dadaf522d27c3d4f2a2ae522bf6) --- sys/amd64/amd64/initcpu.c | 3 +++ sys/x86/include/x86_var.h | 1 + sys/x86/x86/identcpu.c | 12 ++++++++++++ 3 files changed, 16 insertions(+) diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index 44a294da205a..1a251208cfd6 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -292,6 +292,9 @@ initializecpu(void) cr4 |= CR4_SMAP; } load_cr4(cr4); + /* Reload cpu ext features to reflect cr4 changes */ + if (IS_BSP()) + identify_cpu_ext_features(); if (IS_BSP() && (amd_feature & AMDID_NX) != 0) { msr = rdmsr(MSR_EFER) | EFER_NXE; wrmsr(MSR_EFER, msr); diff --git a/sys/x86/include/x86_var.h b/sys/x86/include/x86_var.h index 7c184960635b..4a7637b464fe 100644 --- a/sys/x86/include/x86_var.h +++ b/sys/x86/include/x86_var.h @@ -127,6 +127,7 @@ void restore_wp(bool old_wp); void finishidentcpu(void); void identify_cpu1(void); void identify_cpu2(void); +void identify_cpu_ext_features(void); void identify_cpu_fixup_bsp(void); void identify_hypervisor(void); void initializecpu(void); diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c index cf75d00683f1..263e05dcf0ae 100644 --- a/sys/x86/x86/identcpu.c +++ b/sys/x86/x86/identcpu.c @@ -1612,6 +1612,18 @@ identify_cpu2(void) } } +void +identify_cpu_ext_features(void) +{ + u_int regs[4]; + + if (cpu_high >= 7) { + cpuid_count(7, 0, regs); + cpu_stdext_feature2 = regs[2]; + cpu_stdext_feature3 = regs[3]; + } +} + void identify_cpu_fixup_bsp(void) {