git: 3954e5380a65 - stable/13 - mlx5en: Make the receive packet indirection table, RQT, static instead of dynamic.
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Date: Tue, 08 Feb 2022 15:13:51 UTC
The branch stable/13 has been updated by hselasky:
URL: https://cgit.FreeBSD.org/src/commit/?id=3954e5380a65dc6ef9d6d56f0d8152396fde27d9
commit 3954e5380a65dc6ef9d6d56f0d8152396fde27d9
Author: Hans Petter Selasky <hselasky@FreeBSD.org>
AuthorDate: 2022-02-08 15:08:52 +0000
Commit: Hans Petter Selasky <hselasky@FreeBSD.org>
CommitDate: 2022-02-08 15:08:52 +0000
mlx5en: Make the receive packet indirection table, RQT, static instead of dynamic.
Allocate the RQT once, pointing all initial entries to the drop RQN.
When opening the channels simplify modify the RQT, directing all traffic
to the new RQNs. Similarly when closing the channels point all RQT entries
back to the so-called drop RQN.
Sponsored by: NVIDIA Networking
(cherry picked from commit 33a6a7a72abc1e1c9ecb4b3d12087731fd11f0bb)
---
sys/dev/mlx5/mlx5_en/mlx5_en_main.c | 93 +++++++++++++++++++++++++++++--------
sys/dev/mlx5/mlx5_ifc.h | 9 +++-
2 files changed, 81 insertions(+), 21 deletions(-)
diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c
index 7ac1367198d0..10fd591e0c6d 100644
--- a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c
+++ b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c
@@ -2732,9 +2732,7 @@ mlx5e_close_tises(struct mlx5e_priv *priv)
static int
mlx5e_open_rqt(struct mlx5e_priv *priv)
{
- struct mlx5_core_dev *mdev = priv->mdev;
u32 *in;
- u32 out[MLX5_ST_SZ_DW(create_rqt_out)] = {0};
void *rqtc;
int inlen;
int err;
@@ -2752,7 +2750,38 @@ mlx5e_open_rqt(struct mlx5e_priv *priv)
MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
- for (i = 0; i < sz; i++) {
+ for (i = 0; i != sz; i++)
+ MLX5_SET(rqtc, rqtc, rq_num[i], priv->drop_rq.rqn);
+
+ err = mlx5_core_create_rqt(priv->mdev, in, inlen, &priv->rqtn);
+ kvfree(in);
+
+ return (err);
+}
+
+static int
+mlx5e_activate_rqt(struct mlx5e_priv *priv)
+{
+ u32 *in;
+ void *rqtc;
+ int inlen;
+ int err;
+ int sz;
+ int i;
+
+ sz = 1 << priv->params.rx_hash_log_tbl_sz;
+
+ inlen = MLX5_ST_SZ_BYTES(modify_rqt_in) + sizeof(u32) * sz;
+ in = mlx5_vzalloc(inlen);
+ if (in == NULL)
+ return (-ENOMEM);
+
+ rqtc = MLX5_ADDR_OF(modify_rqt_in, in, ctx);
+
+ MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
+ MLX5_SET(modify_rqt_in, in, bitmask.rqn_list, 1);
+
+ for (i = 0; i != sz; i++) {
int ix = i;
#ifdef RSS
ix = rss_get_indirection_to_bucket(ix);
@@ -2766,27 +2795,41 @@ mlx5e_open_rqt(struct mlx5e_priv *priv)
MLX5_SET(rqtc, rqtc, rq_num[i], priv->channel[ix].rq.rqn);
}
- MLX5_SET(create_rqt_in, in, opcode, MLX5_CMD_OP_CREATE_RQT);
-
- err = mlx5_cmd_exec(mdev, in, inlen, out, sizeof(out));
- if (!err)
- priv->rqtn = MLX5_GET(create_rqt_out, out, rqtn);
-
+ err = mlx5_core_modify_rqt(priv->mdev, priv->rqtn, in, inlen);
kvfree(in);
return (err);
}
-static void
-mlx5e_close_rqt(struct mlx5e_priv *priv)
+static int
+mlx5e_deactivate_rqt(struct mlx5e_priv *priv)
{
- u32 in[MLX5_ST_SZ_DW(destroy_rqt_in)] = {0};
- u32 out[MLX5_ST_SZ_DW(destroy_rqt_out)] = {0};
+ u32 *in;
+ void *rqtc;
+ int inlen;
+ int err;
+ int sz;
+ int i;
+
+ sz = 1 << priv->params.rx_hash_log_tbl_sz;
+
+ inlen = MLX5_ST_SZ_BYTES(modify_rqt_in) + sizeof(u32) * sz;
+ in = mlx5_vzalloc(inlen);
+ if (in == NULL)
+ return (-ENOMEM);
- MLX5_SET(destroy_rqt_in, in, opcode, MLX5_CMD_OP_DESTROY_RQT);
- MLX5_SET(destroy_rqt_in, in, rqtn, priv->rqtn);
+ rqtc = MLX5_ADDR_OF(modify_rqt_in, in, ctx);
- mlx5_cmd_exec(priv->mdev, in, sizeof(in), out, sizeof(out));
+ MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
+ MLX5_SET(modify_rqt_in, in, bitmask.rqn_list, 1);
+
+ for (i = 0; i != sz; i++)
+ MLX5_SET(rqtc, rqtc, rq_num[i], priv->drop_rq.rqn);
+
+ err = mlx5_core_modify_rqt(priv->mdev, priv->rqtn, in, inlen);
+ kvfree(in);
+
+ return (err);
}
#define MLX5E_RSS_KEY_SIZE (10 * 4) /* bytes */
@@ -3156,9 +3199,9 @@ mlx5e_open_locked(struct ifnet *ifp)
"mlx5e_open_channels failed, %d\n", err);
goto err_dalloc_q_counter;
}
- err = mlx5e_open_rqt(priv);
+ err = mlx5e_activate_rqt(priv);
if (err) {
- mlx5_en_err(ifp, "mlx5e_open_rqt failed, %d\n", err);
+ mlx5_en_err(ifp, "mlx5e_activate_rqt failed, %d\n", err);
goto err_close_channels;
}
err = mlx5e_open_tirs(priv, false);
@@ -3215,7 +3258,7 @@ err_close_tirs:
mlx5e_close_tirs(priv, false);
err_close_rqls:
- mlx5e_close_rqt(priv);
+ mlx5e_deactivate_rqt(priv);
err_close_channels:
mlx5e_close_channels(priv);
@@ -3265,7 +3308,7 @@ mlx5e_close_locked(struct ifnet *ifp)
if ((ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0)
mlx5e_close_tirs(priv, true);
mlx5e_close_tirs(priv, false);
- mlx5e_close_rqt(priv);
+ mlx5e_deactivate_rqt(priv);
mlx5e_close_channels(priv);
mlx5_vport_dealloc_q_counter(priv->mdev,
MLX5_INTERFACE_PROTOCOL_ETH, priv->counter_set_id);
@@ -4615,6 +4658,12 @@ mlx5e_create_ifp(struct mlx5_core_dev *mdev)
goto err_tls_init;
}
+ err = mlx5e_open_rqt(priv);
+ if (err) {
+ if_printf(ifp, "%s: mlx5e_open_rqt failed (%d)\n", __func__, err);
+ goto err_open_drop_rq;
+ }
+
/* set default MTU */
mlx5e_set_dev_port_mtu(ifp, ifp->if_mtu);
@@ -4742,6 +4791,9 @@ mlx5e_create_ifp(struct mlx5_core_dev *mdev)
return (priv);
+err_open_drop_rq:
+ mlx5e_close_drop_rq(&priv->drop_rq);
+
err_tls_init:
mlx5e_tls_cleanup(priv);
@@ -4840,6 +4892,7 @@ mlx5e_destroy_ifp(struct mlx5_core_dev *mdev, void *vpriv)
ifmedia_removeall(&priv->media);
ether_ifdetach(ifp);
+ mlx5_core_destroy_rqt(priv->mdev, priv->rqtn, 0);
mlx5e_close_drop_rq(&priv->drop_rq);
mlx5e_tls_cleanup(priv);
mlx5e_rl_cleanup(priv);
diff --git a/sys/dev/mlx5/mlx5_ifc.h b/sys/dev/mlx5/mlx5_ifc.h
index 865548ed1981..cad21858f453 100644
--- a/sys/dev/mlx5/mlx5_ifc.h
+++ b/sys/dev/mlx5/mlx5_ifc.h
@@ -5526,6 +5526,13 @@ struct mlx5_ifc_modify_rqt_out_bits {
u8 reserved_1[0x40];
};
+struct mlx5_ifc_rqt_bitmask_bits {
+ u8 reserved_at_0[0x20];
+
+ u8 reserved_at_20[0x1f];
+ u8 rqn_list[0x1];
+};
+
struct mlx5_ifc_modify_rqt_in_bits {
u8 opcode[0x10];
u8 reserved_0[0x10];
@@ -5538,7 +5545,7 @@ struct mlx5_ifc_modify_rqt_in_bits {
u8 reserved_3[0x20];
- u8 modify_bitmask[0x40];
+ struct mlx5_ifc_rqt_bitmask_bits bitmask;
u8 reserved_4[0x40];