git: e9552d8b45d6 - main - arm: Clear TTBCR before enabling the MMU

The branch main has been updated by markj:

URL: https://cgit.FreeBSD.org/src/commit/?id=e9552d8b45d67ca44d91b3ec09c91253e7e99b28

commit e9552d8b45d67ca44d91b3ec09c91253e7e99b28
Author:     Mark Johnston <markj@FreeBSD.org>
AuthorDate: 2022-08-05 20:21:09 +0000
Commit:     Mark Johnston <markj@FreeBSD.org>
CommitDate: 2022-08-05 20:21:09 +0000

    arm: Clear TTBCR before enabling the MMU
    
    Upon reset, this register is supposed to have a value of zero.  But when
    booting certain v7 CPUs in QEMU, we enter the kernel with several bits
    set, including the EAE bit, which enables ARM's PAE extension.  I'm not
    sure if QEMU is setting it or if it's the uboot loader.  Because FreeBSD
    doesn't implement that extension and uses regular 32-bit page tables,
    the kernel hangs immediately after enabling the MMU.
    
    Just clear everything in TTBCR before enabling the MMU, to match the
    reset value.  FreeBSD doesn't toggle anything in that register.
    
    PR:             251187
    Reviewed by:    imp
    MFC after:      2 weeks
    Sponsored by:   The FreeBSD Foundation
    Differential Revision:  https://reviews.freebsd.org/D36041
---
 sys/arm/arm/locore-v6.S | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/sys/arm/arm/locore-v6.S b/sys/arm/arm/locore-v6.S
index d796e6267cdc..ad96b0b9d638 100644
--- a/sys/arm/arm/locore-v6.S
+++ b/sys/arm/arm/locore-v6.S
@@ -294,6 +294,13 @@ ASENTRY_NP(init_mmu)
 	mov	r0, #DOMAIN_CLIENT	/* Only domain #0 is used */
 	mcr	CP15_DACR(r0)
 
+	/*
+	 * Ensure that LPAE is disabled and that TTBR0 is used for translation,
+	 * use a 16KB translation table
+	 */
+	mov	r0, #0
+	mcr	CP15_TTBCR(r0)
+
 	/*
 	 * Set TEX remap registers
 	 *  - All is set to uncacheable memory