From nobody Fri Dec 24 18:44:27 2021 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 53F261901D8F; Fri, 24 Dec 2021 18:44:28 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4JLGF73kGSz3FxM; Fri, 24 Dec 2021 18:44:27 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 34E3F119E; Fri, 24 Dec 2021 18:44:27 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 1BOIiRVH031555; Fri, 24 Dec 2021 18:44:27 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 1BOIiRFR031554; Fri, 24 Dec 2021 18:44:27 GMT (envelope-from git) Date: Fri, 24 Dec 2021 18:44:27 GMT Message-Id: <202112241844.1BOIiRFR031554@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Michal Meloun Subject: git: 7c0ec6638548 - main - tegra210: Implement new get_gate method for tegra210 clocks. List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mmel X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 7c0ec6638548e78a4fd85a5a2d811bac7c2da98b Auto-Submitted: auto-generated ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1640371467; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=zy94pYtUfSZGJ3WJc7SjvJKyvKfn62agiIkz9bwWhj0=; b=AuD2QQTxnuiV4chS6SfGvcUowuHFlKElJMyQwvlmDgSNwux3XQcswmAAsQoFCrOj3iivfC 8aLG9CG+UxriyTpnzuguhzTjLMarYJPlEIrzuG1rTPEhtoH+sooaejP3kD4GxPPhAFTNzi qRxW9rqcG+wQmWmsGi5EsirWDLg9YEejgXnC7MKhIK1RfiLNHaVjVyTaxJC+P6HCSCyFvF tWwvC2i3/YkvHU1nMslceTNznc1YEt6FdW/zU499NeEckNHAg8XDmKeJ3/yHIThr+FvCxO pHZcbnpkXSO0Tz0i8oS180WGElaJ9ZnxD32AiljdJL7yXJIZ0ws36e95oirmzw== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1640371467; a=rsa-sha256; cv=none; b=dJcv7qMIOE2tePWScL9koE5J9/Cne5OLg/OcVvxwEwVYRN6GMA7olZCOb+Oq33JjsHdK9V aK+wtpBucI6Vm+rTqW4LOjXqv8ePaUDzoete24pMHkFHXAbJZtQu7aCJ5lnNYJxAVfUSPY 4gQTC30PeFCk7u8oyXGnFzxw5kTjrcWypKET8luGEYEzu3ggboM99DoT1NZokSffg093eF 7awyF3tNa3+CtELP/rDOnBdGQqkX5tDo3w7B6o8Lr6OiGImpiPlHzMWvxjfd2FhknW6q4Q Wvlyijwn1TWQKqTRaE7clH7fsyxGENw7jNunb4bPVhL+/Fj0NF+0rUsN4Igq4w== ARC-Authentication-Results: i=1; mx1.freebsd.org; none X-ThisMailContainsUnwantedMimeParts: N The branch main has been updated by mmel: URL: https://cgit.FreeBSD.org/src/commit/?id=7c0ec6638548e78a4fd85a5a2d811bac7c2da98b commit 7c0ec6638548e78a4fd85a5a2d811bac7c2da98b Author: Michal Meloun AuthorDate: 2021-12-24 17:23:59 +0000 Commit: Michal Meloun CommitDate: 2021-12-24 18:43:48 +0000 tegra210: Implement new get_gate method for tegra210 clocks. MFC after: 1 week --- sys/arm64/nvidia/tegra210/tegra210_clk_per.c | 20 ++++++++++++++++++++ sys/arm64/nvidia/tegra210/tegra210_clk_pll.c | 15 +++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/sys/arm64/nvidia/tegra210/tegra210_clk_per.c b/sys/arm64/nvidia/tegra210/tegra210_clk_per.c index 302dd1d85fd3..edf842e1afac 100644 --- a/sys/arm64/nvidia/tegra210/tegra210_clk_per.c +++ b/sys/arm64/nvidia/tegra210/tegra210_clk_per.c @@ -811,6 +811,7 @@ periph_register(struct clkdom *clkdom, struct periph_def *clkdef) /* -------------------------------------------------------------------------- */ static int pgate_init(struct clknode *clk, device_t dev); static int pgate_set_gate(struct clknode *clk, bool enable); +static int pgate_get_gate(struct clknode *clk, bool *enabled); struct pgate_sc { device_t clkdev; @@ -824,6 +825,7 @@ static clknode_method_t pgate_methods[] = { /* Device interface */ CLKNODEMETHOD(clknode_init, pgate_init), CLKNODEMETHOD(clknode_set_gate, pgate_set_gate), + CLKNODEMETHOD(clknode_get_gate, pgate_get_gate), CLKNODEMETHOD_END }; DEFINE_CLASS_1(tegra210_pgate, tegra210_pgate_class, pgate_methods, @@ -885,6 +887,24 @@ pgate_set_gate(struct clknode *clk, bool enable) return(0); } +static int +pgate_get_gate(struct clknode *clk, bool *enabled) +{ + struct pgate_sc *sc; + uint32_t reg, mask, base_reg; + + sc = clknode_get_softc(clk); + mask = 1 << (sc->idx % 32); + base_reg = get_enable_reg(sc->idx); + + DEVICE_LOCK(sc); + RD4(sc, base_reg, ®); + DEVICE_UNLOCK(sc); + *enabled = reg & mask ? true: false; + + return(0); +} + int tegra210_hwreset_by_idx(struct tegra210_car_softc *sc, intptr_t idx, bool reset) { diff --git a/sys/arm64/nvidia/tegra210/tegra210_clk_pll.c b/sys/arm64/nvidia/tegra210/tegra210_clk_pll.c index 624404c3e074..64e3f6623d29 100644 --- a/sys/arm64/nvidia/tegra210/tegra210_clk_pll.c +++ b/sys/arm64/nvidia/tegra210/tegra210_clk_pll.c @@ -568,6 +568,7 @@ static struct clk_div_def tegra210_pll_divs[] = { static int tegra210_pll_init(struct clknode *clk, device_t dev); static int tegra210_pll_set_gate(struct clknode *clk, bool enable); +static int tegra210_pll_get_gate(struct clknode *clk, bool *enabled); static int tegra210_pll_recalc(struct clknode *clk, uint64_t *freq); static int tegra210_pll_set_freq(struct clknode *clknode, uint64_t fin, uint64_t *fout, int flags, int *stop); @@ -588,6 +589,7 @@ static clknode_method_t tegra210_pll_methods[] = { /* Device interface */ CLKNODEMETHOD(clknode_init, tegra210_pll_init), CLKNODEMETHOD(clknode_set_gate, tegra210_pll_set_gate), + CLKNODEMETHOD(clknode_get_gate, tegra210_pll_get_gate), CLKNODEMETHOD(clknode_recalc_freq, tegra210_pll_recalc), CLKNODEMETHOD(clknode_set_freq, tegra210_pll_set_freq), CLKNODEMETHOD_END @@ -886,6 +888,19 @@ tegra210_pll_set_gate(struct clknode *clknode, bool enable) return (rv); } +static int +tegra210_pll_get_gate(struct clknode *clknode, bool *enabled) +{ + uint32_t reg; + struct pll_sc *sc; + + sc = clknode_get_softc(clknode); + RD4(sc, sc->base_reg, ®); + *enabled = reg & PLL_BASE_ENABLE ? true: false; + WR4(sc, sc->base_reg, reg); + return (0); +} + static int pll_set_std(struct pll_sc *sc, uint64_t fin, uint64_t *fout, int flags, uint32_t m, uint32_t n, uint32_t p)