git: a40e7b1a6528 - main - cad/verilator: update 5.020 → 5.022

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From: Yuri Victorovich <yuri_at_FreeBSD.org>
Date: Sun, 25 Feb 2024 08:04:11 UTC
The branch main has been updated by yuri:

URL: https://cgit.FreeBSD.org/ports/commit/?id=a40e7b1a6528a4c96bf0271d5f0ca2cf6035093a

commit a40e7b1a6528a4c96bf0271d5f0ca2cf6035093a
Author:     Yuri Victorovich <yuri@FreeBSD.org>
AuthorDate: 2024-02-25 08:03:48 +0000
Commit:     Yuri Victorovich <yuri@FreeBSD.org>
CommitDate: 2024-02-25 08:04:06 +0000

    cad/verilator: update 5.020 → 5.022
    
    Reported by:    portscout
---
 cad/verilator/Makefile  |  3 +--
 cad/verilator/distinfo  |  6 +++---
 cad/verilator/pkg-plist | 10 +++++-----
 3 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/cad/verilator/Makefile b/cad/verilator/Makefile
index 7ddb5dd7e670..7e3a9252e17d 100644
--- a/cad/verilator/Makefile
+++ b/cad/verilator/Makefile
@@ -1,7 +1,6 @@
 PORTNAME=	verilator
 DISTVERSIONPREFIX=	v
-DISTVERSION=	5.020
-PORTREVISION=	1
+DISTVERSION=	5.022
 CATEGORIES=	cad
 
 MAINTAINER=	yuri@FreeBSD.org
diff --git a/cad/verilator/distinfo b/cad/verilator/distinfo
index e701869402d9..eb8fe002c41c 100644
--- a/cad/verilator/distinfo
+++ b/cad/verilator/distinfo
@@ -1,3 +1,3 @@
-TIMESTAMP = 1704173296
-SHA256 (verilator-verilator-v5.020_GH0.tar.gz) = 41ca9abfadf8d2413efbff7f8277379733d0095957fe7769dc38f8fd1bc899a6
-SIZE (verilator-verilator-v5.020_GH0.tar.gz) = 3526151
+TIMESTAMP = 1708837162
+SHA256 (verilator-verilator-v5.022_GH0.tar.gz) = 2602d38c4da19133fad12c60570665d40cb8d014b958ab648ff44487b88bf60c
+SIZE (verilator-verilator-v5.022_GH0.tar.gz) = 3761455
diff --git a/cad/verilator/pkg-plist b/cad/verilator/pkg-plist
index 8ab1636bd5e0..9f1032e7b298 100644
--- a/cad/verilator/pkg-plist
+++ b/cad/verilator/pkg-plist
@@ -23,6 +23,11 @@ share/man/man1/verilator_profcfunc.1.gz
 %%DATADIR%%/examples/cmake_tracing_c/Makefile
 %%DATADIR%%/examples/cmake_tracing_sc/CMakeLists.txt
 %%DATADIR%%/examples/cmake_tracing_sc/Makefile
+%%DATADIR%%/examples/json_py/Makefile
+%%DATADIR%%/examples/json_py/sub.v
+%%DATADIR%%/examples/json_py/top.v
+%%DATADIR%%/examples/json_py/vl_file_copy
+%%DATADIR%%/examples/json_py/vl_hier_graph
 %%DATADIR%%/examples/make_hello_binary/Makefile
 %%DATADIR%%/examples/make_hello_binary/top.v
 %%DATADIR%%/examples/make_hello_c/Makefile
@@ -47,11 +52,6 @@ share/man/man1/verilator_profcfunc.1.gz
 %%DATADIR%%/examples/make_tracing_sc/sc_main.cpp
 %%DATADIR%%/examples/make_tracing_sc/sub.v
 %%DATADIR%%/examples/make_tracing_sc/top.v
-%%DATADIR%%/examples/xml_py/Makefile
-%%DATADIR%%/examples/xml_py/sub.v
-%%DATADIR%%/examples/xml_py/top.v
-%%DATADIR%%/examples/xml_py/vl_file_copy
-%%DATADIR%%/examples/xml_py/vl_hier_graph
 %%DATADIR%%/include/gtkwave/fastlz.c
 %%DATADIR%%/include/gtkwave/fastlz.h
 %%DATADIR%%/include/gtkwave/fst_config.h