git: 5831e0c7d93b - main - Add cad/pcb-rnd: Flexible, modular Printed Circuit Board editor

From: Li-Wen Hsu <lwhsu_at_FreeBSD.org>
Date: Sun, 05 Jun 2022 15:26:34 UTC
The branch main has been updated by lwhsu:

URL: https://cgit.FreeBSD.org/ports/commit/?id=5831e0c7d93b2c34b0d3708effcf8aa20bc1b2a0

commit 5831e0c7d93b2c34b0d3708effcf8aa20bc1b2a0
Author:     Robert Clausecker <fuz@fuz.su>
AuthorDate: 2022-06-05 15:24:44 +0000
Commit:     Li-Wen Hsu <lwhsu@FreeBSD.org>
CommitDate: 2022-06-05 15:26:25 +0000

    Add cad/pcb-rnd: Flexible, modular Printed Circuit Board editor
    
    PR:             264289
---
 cad/Makefile                                       |   1 +
 cad/pcb-rnd/Makefile                               |  30 ++
 cad/pcb-rnd/distinfo                               |   3 +
 .../files/patch-scconfig_src_sul_find__freetype2.c |  11 +
 cad/pcb-rnd/pkg-descr                              |   8 +
 cad/pcb-rnd/pkg-plist                              | 597 +++++++++++++++++++++
 6 files changed, 650 insertions(+)

diff --git a/cad/Makefile b/cad/Makefile
index d1ae58b9eb62..3400156f20a8 100644
--- a/cad/Makefile
+++ b/cad/Makefile
@@ -99,6 +99,7 @@
     SUBDIR += p5-Verilog-Perl
     SUBDIR += padring
     SUBDIR += pcb
+    SUBDIR += pcb-rnd
     SUBDIR += pdnmesh
     SUBDIR += py-cadquery
     SUBDIR += py-cq-editor
diff --git a/cad/pcb-rnd/Makefile b/cad/pcb-rnd/Makefile
new file mode 100644
index 000000000000..136a86a00ba5
--- /dev/null
+++ b/cad/pcb-rnd/Makefile
@@ -0,0 +1,30 @@
+PORTNAME=	pcb-rnd
+DISTVERSION=	3.0.4
+CATEGORIES=	cad
+MASTER_SITES=	http://repo.hu/projects/pcb-rnd/releases/
+
+MAINTAINER=	fuz@fuz.su
+COMMENT=	Flexible, modular Printed Circuit Board editor
+
+LICENSE=	GPLv2
+LICENSE_FILE=	${WRKSRC}/COPYING
+
+LIB_DEPENDS=	libfungw.so:devel/fungw \
+		librnd-hid.so:cad/librnd \
+		libfreetype.so:print/freetype2 \
+		libgd.so:graphics/gd \
+		libxml2.so:textproc/libxml2
+
+USES=		gmake pkgconfig tar:bz2
+
+HAS_CONFIGURE=	yes
+BINARY_ALIAS=	make=${MAKE_CMD}
+
+OPTIONS_DEFINE=	DOCS
+
+pre-configure:
+	${REINPLACE_CMD} \
+	    -e 's,%%LOCALBASE%%,${LOCALBASE},g' \
+	    ${WRKSRC}/scconfig/src/sul/find_freetype2.c
+
+.include <bsd.port.mk>
diff --git a/cad/pcb-rnd/distinfo b/cad/pcb-rnd/distinfo
new file mode 100644
index 000000000000..9b3841f40444
--- /dev/null
+++ b/cad/pcb-rnd/distinfo
@@ -0,0 +1,3 @@
+TIMESTAMP = 1651840727
+SHA256 (pcb-rnd-3.0.4.tar.bz2) = 77c1b5c5e8ea6ab10e3b5a336d2b46e7e58748e922fbeb1d74605743c6adfb81
+SIZE (pcb-rnd-3.0.4.tar.bz2) = 4528842
diff --git a/cad/pcb-rnd/files/patch-scconfig_src_sul_find__freetype2.c b/cad/pcb-rnd/files/patch-scconfig_src_sul_find__freetype2.c
new file mode 100644
index 000000000000..353415d85b5d
--- /dev/null
+++ b/cad/pcb-rnd/files/patch-scconfig_src_sul_find__freetype2.c
@@ -0,0 +1,11 @@
+--- scconfig/src/sul/find_freetype2.c.orig	2022-05-27 13:11:01 UTC
++++ scconfig/src/sul/find_freetype2.c
+@@ -57,7 +57,7 @@ int find_sul_freetype2(const char *name, int logdepth,
+ 	if (try_icl(logdepth, node, test_c, NULL, NULL, "-lfreetype"))
+ 		return 0;
+ 
+-	if (try_icl(logdepth, node, test_c, NULL, "-I/usr/include/freetype2 -I/usr/include/freetype2/freetype", "-lfreetype"))
++	if (try_icl(logdepth, node, test_c, NULL, "-I%%LOCALBASE%%/include/freetype2 -I%%LOCALBASE%%/include/freetype2/freetype -L%%LOCALBASE%%/lib", "-lfreetype"))
+ 		return 0;
+ 
+ 	if (try_icl(logdepth, node, test_c, NULL, "-I/usr/include/freetype2", "-lfreetype"))
diff --git a/cad/pcb-rnd/pkg-descr b/cad/pcb-rnd/pkg-descr
new file mode 100644
index 000000000000..c05b06a1f1a5
--- /dev/null
+++ b/cad/pcb-rnd/pkg-descr
@@ -0,0 +1,8 @@
+pcb-rnd is a free/open source, flexible, modular Printed Circuit Board editor
+
+ - for design of professional and hobby boards.
+ - is feature-rich and compatible
+ - has a long history, fast paced development, and big plans.
+ - is part of the coralEDA ecosystem.
+
+WWW: http://www.repo.hu/projects/pcb-rnd/
diff --git a/cad/pcb-rnd/pkg-plist b/cad/pcb-rnd/pkg-plist
new file mode 100644
index 000000000000..6a8b5163a3cd
--- /dev/null
+++ b/cad/pcb-rnd/pkg-plist
@@ -0,0 +1,597 @@
+bin/bxl2txt
+bin/fp2preview
+bin/fp2subc
+bin/gsch2pcb-rnd
+bin/pcb-prj2lht
+bin/pcb-rnd
+bin/pcb-rnd-svg
+bin/txt2bxl
+%%ETCDIR%%/adialogs.conf
+%%ETCDIR%%/ar_extern.conf
+%%ETCDIR%%/asm.conf
+%%ETCDIR%%/cam.conf
+%%ETCDIR%%/ch_editpoint.conf
+%%ETCDIR%%/conf_core.lht
+%%ETCDIR%%/drc_query.conf
+%%ETCDIR%%/export_xy.conf
+%%ETCDIR%%/fp_fs.conf
+%%ETCDIR%%/fp_wget.conf
+%%ETCDIR%%/import_gnetlist.conf
+%%ETCDIR%%/io_pads.conf
+%%ETCDIR%%/menu-default.lht
+%%ETCDIR%%/show_netnames.conf
+lib/pcb-rnd/gnet-gsch2pcb-rnd.scm
+lib/pcb-rnd/gnet-pcbrndfwd.scm
+lib/pcb-rnd/gnet-pcbrndfwd_elem.scm
+lib/pcb-rnd/plugins/ar_cpcb.pup
+lib/pcb-rnd/plugins/ar_cpcb.so
+lib/pcb-rnd/plugins/dialogs.pup
+lib/pcb-rnd/plugins/dialogs.so
+lib/pcb-rnd/plugins/draw_csect.pup
+lib/pcb-rnd/plugins/draw_csect.so
+lib/pcb-rnd/plugins/draw_fontsel.pup
+lib/pcb-rnd/plugins/draw_fontsel.so
+lib/pcb-rnd/plugins/fp_wget.pup
+lib/pcb-rnd/plugins/fp_wget.so
+lib/pcb-rnd/plugins/import_accel_net.pup
+lib/pcb-rnd/plugins/import_accel_net.so
+lib/pcb-rnd/plugins/import_mentor_sch.pup
+lib/pcb-rnd/plugins/import_mentor_sch.so
+lib/pcb-rnd/plugins/import_orcad_net.pup
+lib/pcb-rnd/plugins/import_orcad_net.so
+lib/pcb-rnd/plugins/io_dsn.pup
+lib/pcb-rnd/plugins/io_dsn.so
+lib/pcb-rnd/plugins/io_kicad.pup
+lib/pcb-rnd/plugins/io_kicad.so
+lib/pcb-rnd/plugins/io_kicad_legacy.pup
+lib/pcb-rnd/plugins/io_kicad_legacy.so
+lib/pcb-rnd/plugins/lib_hid_pcbui.pup
+lib/pcb-rnd/plugins/lib_hid_pcbui.so
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+%%PORTDOCS%%%%DOCSDIR%%/INSTALL.UNIX.txt
+%%PORTDOCS%%%%DOCSDIR%%/INSTALL.librnd.txt
+%%PORTDOCS%%%%DOCSDIR%%/INSTALL.mac.txt
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+%%PORTDOCS%%%%DOCSDIR%%/TODO
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+%%PORTDOCS%%%%DOCSDIR%%/conf/merging.png
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+%%DATADIR%%/footprint/thru-hole/TO220ACSTAND.fp
+%%DATADIR%%/footprint/thru-hole/TO220S.fp
+%%DATADIR%%/footprint/thru-hole/TO220SW.fp
+%%DATADIR%%/footprint/thru-hole/TO220W.fp
+%%DATADIR%%/footprint/thru-hole/TO247.fp
+%%DATADIR%%/footprint/thru-hole/TO247_2.fp
+%%DATADIR%%/footprint/thru-hole/TO251.fp
+%%DATADIR%%/footprint/thru-hole/TO264.fp
+%%DATADIR%%/footprint/thru-hole/TO39.fp
+%%DATADIR%%/footprint/thru-hole/TO92.fp