git: 3787726b8001 - main - cad/p5-Verilog-Perl: update to 3.478

The branch main has been updated by tagattie:

URL: https://cgit.FreeBSD.org/ports/commit/?id=3787726b800112153d6076e57ee1b11da84d9167

commit 3787726b800112153d6076e57ee1b11da84d9167
Author:     Gian-Simon Purkert <gspurki@gmail.com>
AuthorDate: 2021-12-23 10:33:28 +0000
Commit:     Hiroki Tagato <tagattie@FreeBSD.org>
CommitDate: 2021-12-23 10:33:28 +0000

    cad/p5-Verilog-Perl: update to 3.478
    
    Changelog: https://metacpan.org/dist/Verilog-Perl/changes
    
    PR:             259336
    Approved by:    otacilio.neto@bsd.com.br (maintainer timeout, >2 months)
---
 cad/p5-Verilog-Perl/Makefile  | 2 +-
 cad/p5-Verilog-Perl/distinfo  | 5 +++--
 cad/p5-Verilog-Perl/pkg-plist | 4 ++--
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/cad/p5-Verilog-Perl/Makefile b/cad/p5-Verilog-Perl/Makefile
index 860dee75ad2f..47c793e416ba 100644
--- a/cad/p5-Verilog-Perl/Makefile
+++ b/cad/p5-Verilog-Perl/Makefile
@@ -1,7 +1,7 @@
 # Created by: Otacilio de Araujo Ramos Neto <otacilio.neto@bsd.com.br>
 
 PORTNAME=	Verilog-Perl
-PORTVERSION=	3.418
+PORTVERSION=	3.478
 CATEGORIES=	cad perl5
 MASTER_SITES=	CPAN
 PKGNAMEPREFIX=	p5-
diff --git a/cad/p5-Verilog-Perl/distinfo b/cad/p5-Verilog-Perl/distinfo
index eb4d6f49483e..ac092f06f4cb 100644
--- a/cad/p5-Verilog-Perl/distinfo
+++ b/cad/p5-Verilog-Perl/distinfo
@@ -1,2 +1,3 @@
-SHA256 (Verilog-Perl-3.418.tar.gz) = 19eb60cb211fe6dbe6f9705f973e72c9ffd370399c39f0871652d4bee61492e8
-SIZE (Verilog-Perl-3.418.tar.gz) = 562256
+TIMESTAMP = 1634810863
+SHA256 (Verilog-Perl-3.478.tar.gz) = 221fccecb90a5a6509e5d46fcb85dabb4326ce330398cc55b09583999e0b979c
+SIZE (Verilog-Perl-3.478.tar.gz) = 612531
diff --git a/cad/p5-Verilog-Perl/pkg-plist b/cad/p5-Verilog-Perl/pkg-plist
index c0315353a1b0..72123203b191 100644
--- a/cad/p5-Verilog-Perl/pkg-plist
+++ b/cad/p5-Verilog-Perl/pkg-plist
@@ -17,13 +17,13 @@ bin/vsplitmodule
 %%SITE_ARCH%%/Verilog/Netlist/Module.pm
 %%SITE_ARCH%%/Verilog/Netlist/Net.pm
 %%SITE_ARCH%%/Verilog/Netlist/Pin.pm
+%%SITE_ARCH%%/Verilog/Netlist/PinSelection.pm
 %%SITE_ARCH%%/Verilog/Netlist/Port.pm
 %%SITE_ARCH%%/Verilog/Netlist/Subclass.pm
 %%SITE_ARCH%%/Verilog/Parser.pm
 %%SITE_ARCH%%/Verilog/Preproc.pm
 %%SITE_ARCH%%/Verilog/SigParser.pm
 %%SITE_ARCH%%/Verilog/Std.pm
-%%SITE_ARCH%%/Verilog/Verilog-Perl.pod
 %%SITE_ARCH%%/auto/Verilog/Parser/Parser.so
 %%SITE_ARCH%%/auto/Verilog/Preproc/Preproc.so
 %%PERL5_MAN1%%/vhier.1.gz
@@ -44,10 +44,10 @@ bin/vsplitmodule
 %%PERL5_MAN3%%/Verilog::Netlist::Module.3.gz
 %%PERL5_MAN3%%/Verilog::Netlist::Net.3.gz
 %%PERL5_MAN3%%/Verilog::Netlist::Pin.3.gz
+%%PERL5_MAN3%%/Verilog::Netlist::PinSelection.3.gz
 %%PERL5_MAN3%%/Verilog::Netlist::Port.3.gz
 %%PERL5_MAN3%%/Verilog::Netlist::Subclass.3.gz
 %%PERL5_MAN3%%/Verilog::Parser.3.gz
 %%PERL5_MAN3%%/Verilog::Preproc.3.gz
 %%PERL5_MAN3%%/Verilog::SigParser.3.gz
 %%PERL5_MAN3%%/Verilog::Std.3.gz
-%%PERL5_MAN3%%/Verilog::Verilog-Perl.3.gz