git: a3f164a0c7af - main - gicv3: Define PA masks for the PENDBASR and PROPBASER registers

From: Warner Losh <imp_at_FreeBSD.org>
Date: Wed, 28 Feb 2024 14:10:46 UTC
The branch main has been updated by imp:

URL: https://cgit.FreeBSD.org/src/commit/?id=a3f164a0c7af17b6b1903e8f13d1b70072e1ccd0

commit a3f164a0c7af17b6b1903e8f13d1b70072e1ccd0
Author:     Warner Losh <imp@FreeBSD.org>
AuthorDate: 2024-02-28 14:09:02 +0000
Commit:     Warner Losh <imp@FreeBSD.org>
CommitDate: 2024-02-28 14:09:42 +0000

    gicv3: Define PA masks for the PENDBASR and PROPBASER registers
    
    Define masks for these registers to find the PA of where these are
    pointing.
    
    Sponsored by:           Netflix
    Reviewed by:            andrew
    Differential Revision:  https://reviews.freebsd.org/D44096
---
 sys/arm64/arm64/gic_v3_reg.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/sys/arm64/arm64/gic_v3_reg.h b/sys/arm64/arm64/gic_v3_reg.h
index 16b1cd438350..792b532196a9 100644
--- a/sys/arm64/arm64/gic_v3_reg.h
+++ b/sys/arm64/arm64/gic_v3_reg.h
@@ -182,6 +182,15 @@
 #define		GICR_PROPBASER_OUTER_CACHE_MASK		\
 		    (0x7UL << GICR_PROPBASER_OUTER_CACHE_SHIFT)
 
+/*
+ * The PROPBASER LPI Configuration Table is 4k aligned, so bits 51:12 are
+ * defined to be the PA, for 40 potentially significant bits.
+ */
+#define		GICR_PROPBASER_PA_SHIFT		12
+#define		GICR_PROPBASER_PA_SIZE		40
+#define		GICR_PROPBASER_PA_MASK		\
+		    (((1UL << GICR_PROPBASER_PA_SIZE) - 1) << GICR_PROPBASER_PA_SHIFT)
+
 #define	GICR_PENDBASER		0x0078
 /*
  * Cacheability
@@ -225,6 +234,15 @@
 #define		GICR_PENDBASER_OUTER_CACHE_MASK		\
 		    (0x7UL << GICR_PENDBASER_OUTER_CACHE_SHIFT)
 
+/*
+ * The LPI Pending Table (PENDBASER) is 64k aligned. So bits 51:16 are defined to be the PA, for 36
+ * potentially significant bits.
+ */
+#define		GICR_PENDBASER_PA_SHIFT		16
+#define		GICR_PENDBASER_PA_SIZE		36
+#define		GICR_PENDBASER_PA_MASK		\
+	(((1UL << GICR_PENDBASER_PA_SIZE) - 1) << GICR_PENDBASER_PA_SHIFT)
+
 #define	GICR_INVLPIR		0x00a0
 #define	GICR_INVALLR		0x00b0
 #define	GICR_SYNCR		0x00c0